SAF-C161K-LM Infineon Technologies, SAF-C161K-LM Datasheet - Page 14

• Manufacturer Part Number: SAF-C161K-LM
• Manufacturer: Infineon Technologies

Specifications of SAF-C161K-LM

• Packages: PG-MQFP-80
• Max Clock Frequency: 20.0 MHz
• Sram (incl. Cache): 1.0 KByte
• Program Memory: 0.0 KByte

C161K
C161O
Memory Organization
The memory space of the C161K/O is configured in a Von Neumann architecture which
means that code memory, data memory, registers and I/O ports are organized within the
same linear address space which includes 16 MBytes. The entire memory space can be
accessed bytewise or wordwise. Particular portions of the on-chip memory have
additionally been made directly bitaddressable.
The C161K/O is prepared to incorporate on-chip program memory (not in the ROM-less
derivatives, of course) for code or constant data. The internal ROM area can be mapped
either to segment 0 or segment 1.
On-chip Internal RAM (IRAM) is provided (1 KByte in the C161K, 2 KBytes in the
C161O) as a storage for user defined variables, for the system stack, general purpose
register banks and even for code. A register bank can consist of up to 16 wordwide (R0
to R15) and/or bytewide (RL0, RH0, …, RL7, RH7) so-called General Purpose Registers
(GPRs).
1024 bytes (2
512 bytes) of the address space are reserved for the Special Function
Register areas (SFR space and ESFR space). SFRs are wordwide registers which are
used for controlling and monitoring functions of the different on-chip units. Unused SFR
addresses are reserved for future members of the C166 Family.
In order to meet the needs of designs where more memory is required than is provided
on chip, up to 4 MBytes of external RAM and/or ROM can be connected to the
microcontroller.
Data Sheet
10
V2.0, 2001-01