SAB C165-LM Infineon Technologies, SAB C165-LM Datasheet - Page 16

• Manufacturer Part Number: SAB C165-LM
• Manufacturer: Infineon Technologies

Specifications of SAB C165-LM

• Packages: PG-MQFP-100
• Max Clock Frequency: 20.0 MHz
• Sram (incl. Cache): 2.0 KByte
• Program Memory: 0.0 KByte

Functional Description
The architecture of the C165 combines advantages of both RISC and CISC processors
and of advanced peripheral subsystems in a very well-balanced way. In addition the
on-chip memory blocks allow the design of compact systems with maximum
performance.
The following block diagram gives an overview of the different on-chip components and
of the advanced, high bandwidth internal bus structure of the C165.
Note: All time specifications refer to a CPU clock of 25 MHz
Figure 4
The program memory, the internal RAM (IRAM) and the set of generic peripherals are
connected to the CPU via separate buses. A fourth bus, the XBUS, connects external
resources as well as additional on-chip resoures, the X-Peripherals (see
Data Sheet
8
8
(see definition in the AC Characteristics section).
ProgMem
Internal
ROM
Area
XBUS Control
External Bus
Port 0
Block Diagram
Control
16
EBC
Instr. / Data
16
16
Port 1
32
16
External Instr. / Data
(USART)
ASC0
BRGen
Interrupt Controller 16-Level
Port 3
C166-Core
CPU
BRGen
SSC
(SPI)
15
12
PEC
Priority
GPT
T2
T3
T4
T5
T6
Interrupt Bus
Peripheral Data Bus
Data
Data
16
Port 5
6
16
16
2 KByte
Internal
Osc
IRAM
RAM
Figure
WDT
V2.0, 2000-12
XTAL
4).
8
C165