74LV241D,118 NXP Semiconductors, 74LV241D,118 Datasheet

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74LV241D,118

Manufacturer Part Number
74LV241D,118
Description
IC BUFF/DVR TRI-ST DUAL 20SOIC
Manufacturer
NXP Semiconductors
Series
74LVr
Datasheet
1.74LV241N112.pdf (17 pages)

Specifications of 74LV241D,118

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
4
Current - Output High, Low
8mA, 8mA
Voltage - Supply
1 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LV241D-T
74LV241D-T
935186090118
1. General description
2. Features
3. Quick reference data
The 74LV241 is a low-voltage, Si-gate CMOS device and is pin and function compatible
with 74HC241 and 74HCT241.
The 74LV241 is an octal non-inverting buffer/line driver with 3-state outputs. The 3-state
outputs are controlled by the output enable inputs (pins 1OE and 2OE).
Table 1:
GND = 0 V; T
[1]
Symbol
t
C
C
PHL
i
PD
74LV241
Octal buffer/line driver; 3-state
Rev. 03 — 10 October 2005
Optimized for low-voltage applications from 1.0 V to 3.6 V
Accepts TTL input levels between V
Typical V
Typical V
ESD protection:
, t
C
P
f
f
C
V
N = number of inputs switching;
i
o
(C
D
CC
PD
= input frequency in MHz;
L
PLH
= output frequency in MHz;
= output load capacitance in pF;
HBM EIA/JESD22-A114-C exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
PD
V
Parameter
propagation delay
1An to 1Yn, 2An to 2Yn
input capacitance
power dissipation
capacitance
Quick reference data
CC
amb
OLP
OHV
2
V
CC
= 25 C; t
f
o
(output ground bounce) < 0.8 V at V
(output V
2
) = sum of the outputs.
f
i
N + (C
r
= t
OH
f
L
undershoot) > 2 V at V
2.5 ns.
V
CC
Conditions
C
V
V
V
2
CC
CC
I
L
= GND to V
= 15 pF;
f
o
= 3.3 V
= 3.3 V;
) where:
CC
= 2.7 V and V
CC
D
CC
CC
in W).
= 3.3 V and T
= 3.3 V and T
CC
[1]
Product data sheet
= 3.6 V
Min
-
-
-
Typ
8.0
3.5
30
amb
amb
= 25 C
= 25 C
Max
-
-
-
Unit
ns
pF
pF

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74LV241D,118 Summary of contents

Page 1

Octal buffer/line driver; 3-state Rev. 03 — 10 October 2005 1. General description The 74LV241 is a low-voltage, Si-gate CMOS device and is pin and function compatible with 74HC241 and 74HCT241. The 74LV241 is an octal non-inverting buffer/line driver ...

Page 2

Philips Semiconductors 4. Ordering information Table 2: Ordering information Type number Package Temperature range Name 74LV241N +125 C 74LV241D +125 C 74LV241DB +125 C 74LV241PW +125 C 5. ...

Page 3

Philips Semiconductors Fig 2. Logic symbol 6. Pinning information 6.1 Pinning Fig 4. Pin configuration 6.2 Pin description Table 3: Symbol 1OE 1A0 2Y0 1A1 2Y1 74LV241_3 Product data sheet 1A0 1Y0 2A0 2Y0 4 1A1 ...

Page 4

Philips Semiconductors Table 3: Symbol 1A2 2Y2 1A3 2Y3 GND 2A3 1Y3 2A2 1Y2 2A1 1Y1 2A0 1Y0 2OE Functional description 7.1 Function table Table 4: Input 1OE [ HIGH voltage level; ...

Page 5

Philips Semiconductors Table 5: In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol GND T stg P tot [1] For DIL20 packages: above 70 C the ...

Page 6

Philips Semiconductors Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter V HIGH-level output voltage OH V LOW-level output voltage OL I input leakage current LI I 3-state output OFF-state ...

Page 7

Philips Semiconductors Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter I 3-state output OFF-state OZ current I quiescent supply current CC I additional quiescent supply CC current per input ...

Page 8

Philips Semiconductors Table 8: Dynamic characteristics Voltages are referenced to GND (ground = 0 V); C Symbol Parameter 3-state output enable time PZH PZL 1OE to 1Yn, 2OE to 2Yn 3-state output disable time ...

Page 9

Philips Semiconductors Fig 6. 3-state enable and disable times for input 1OE Fig 7. 3-state enable and disable times for input 2OE Table 9: Supply voltage V CC < 2.7 V 2.7 V 74LV241_3 Product data sheet V I 1OE ...

Page 10

Philips Semiconductors Fig 8. Load circuitry for switching times Table 10: Supply voltage V CC < 2.7 V 2.7 V 74LV241_3 Product data sheet V I PULSE GENERATOR Test data is given in Table 10. Definitions test circuit ...

Page 11

Philips Semiconductors 13. Package outline DIP20: plastic dual in-line package; 20 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. ...

Page 12

Philips Semiconductors SO20: plastic small outline package; 20 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. ...

Page 13

Philips Semiconductors SSOP20: plastic shrink small outline package; 20 leads; body width 5 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1.80 mm ...

Page 14

Philips Semiconductors TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm ...

Page 15

Philips Semiconductors 14. Revision history Table 11: Revision history Document ID Release date 74LV241_3 20051010 • Modifications: The format of this data sheet has been redesigned to comply with the new presentation and information standard of Philips Semiconductors. • Section ...

Page 16

Philips Semiconductors 15. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...

Page 17

Philips Semiconductors 20. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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