PCA9517DP NXP Semiconductors, PCA9517DP Datasheet
PCA9517DP
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PCA9517DP Summary of contents
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PCA9517 Level translating I Rev. 03 — 30 January 2007 1. General description The PCA9517 is a CMOS integrated circuit that provides level shifting between low voltage (down to 0.9 V) and higher voltage (2 5 ...
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... Ordering information Table 1. Ordering information +85 C amb Type number Topside Package mark Name PCA9517D PCA9517 SO8 PCA9517DP 9517 TSSOP8 [1] Also known as MSOP8 4. Functional diagram Fig 1. Functional diagram of PCA9517 PCA9517_3 Product data sheet 2 C-bus pins 2 C-bus and enable pins Description plastic small outline package ...
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... V and the V CCB the B-side pull-down driver is turned off and the external pull-up resistor CCA Rev. 03 — 30 January 2007 PCA9517 Level translating CCA SCLA 2 PCA9517DP SDAA 3 GND 4 002aac199 Fig 3. Pin configuration for TSSOP8 (MSOP8) PCA9517”. as low as 0.9 V CCA 2 C-bus or SMBus ...
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... NXP Semiconductors be able to rise to 0.5 V until the A-side rises above 0.3V to rise being pulled up by the external pull-up resistor. The V the 0.3V circuit. The PCA9517 logic and all I/Os are powered by the V 6.1 Enable The EN pin is active HIGH with an internal pull- when the repeater is active. This can be used to isolate a badly behaved slave on power-up until after the system power-up reset ...
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... NXP Semiconductors 7. Application design-in information A typical application is shown 3 Master devices can be placed on either bus. Fig 4. Typical application The PCA9517 tolerant does not require any additional circuitry to translate between 0 5.5 V bus voltages and 2 5.5 V bus voltages. When the A-side of the PCA9517 is pulled LOW by a driver on the I detects the falling edge when it goes below 0 ...
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... NXP Semiconductors Fig 5. Typical star application SDAA SDA SCLA SCL BUS PCA9517 MASTER EN Fig 6. Typical series application PCA9517_3 Product data sheet V CCA SDAA SDA SCLA SCL BUS MASTER EN SDAA SCLA EN SDAA SCLA SDAB ...
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... NXP Semiconductors Fig 7. Typical application of PCA9517 driving a short cable SCL SDA Fig 8. Bus A (0 5.5 V bus) waveform SCL SDA Fig 9. Bus B (2 5.5 V) waveform PCA9517_3 Product data sheet CARD 1 CARD 9th clock pulse acknowledge 9th clock pulse acknowledge ...
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... NXP Semiconductors 8. Limiting values Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage, B-side bus CCB V supply voltage, A-side bus CCA 2 V voltage on I C-bus B-side, or enable (EN) bus I DC current P total power dissipation tot ...
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... NXP Semiconductors 9. Static characteristics Table 4. Static characteristics 5.5 V; GND = Symbol Parameter Supplies V supply voltage, B-side bus CCB V supply voltage, A-side bus CCA I supply current on pin V CC(VCCA) I HIGH-state supply current CCH I LOW-state supply current CCL I quiescent supply current in CCAc ...
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... NXP Semiconductors Table 4. Static characteristics 5.5 V; GND = Symbol Parameter Enable V LOW-level input voltage IL V HIGH-level input voltage IH I LOW-level input current on pin EN IL(EN) I input leakage current LI C input capacitance i [1] LOW-level supply voltage. [2] V specification is for the first LOW level seen by the SDAB/SCLB lines SDAB/SCLB lines ...
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... NXP Semiconductors 10.1 AC waveforms input 1 PHL 80 % 0.6 V output t(HL) Fig 10. Propagation delay and transition times; B-side to A-side Fig 12. Propagation delay 11. Test information Fig 13. Test circuit for open-drain outputs PCA9517_3 Product data sheet 3.0 V 1 PLH 1 0 t(LH) 002aac207 Fig 11. Propagation delay and transition times; ...
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... NXP Semiconductors 12. Package outline SO8: plastic small outline package; 8 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Notes 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors TSSOP8: plastic thin shrink small outline package; 8 leads; body width pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors 13. Soldering This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description” . 13.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...
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... NXP Semiconductors 13.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...
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... NXP Semiconductors Fig 16. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 14. Abbreviations Table 8. Acronym CDM CMOS ESD HBM 2 I C-bus MM SMBus PCA9517_3 Product data sheet ...
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... Document ID Release date PCA9517_3 20070130 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Section 2 JESD22-A115” • ...
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... For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 3 6.1 Enable 6.2 I C-bus systems . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Application design-in information . . . . . . . . . . 5 8 Limiting values Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . 10 10.1 AC waveforms Test information ...