74HCT2G125DC,125 NXP Semiconductors, 74HCT2G125DC,125 Datasheet

IC BUFF DVR TRI-ST DL 8VSSOP

74HCT2G125DC,125

Manufacturer Part Number
74HCT2G125DC,125
Description
IC BUFF DVR TRI-ST DL 8VSSOP
Manufacturer
NXP Semiconductors
Series
74HCTr
Datasheet

Specifications of 74HCT2G125DC,125

Package / Case
US8, 8-VSSOP
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
1
Current - Output High, Low
6mA, 6mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
HCT
Number Of Channels Per Chip
2
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 6 mA
Input Bias Current (max)
20 uA
Low Level Output Current
6 mA
Minimum Operating Temperature
- 40 C
Output Type
3-State
Propagation Delay Time
15 ns (Typ) @ 4.5 V
Number Of Lines (input / Output)
2 / 2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74HCT2G125DC-G
74HCT2G125DC-G
935274707125
1. General description
2. Features
3. Ordering information
Table 1.
Type number
74HC2G125DP
74HCT2G125DP
74HC2G125DC
74HCT2G125DC
74HC2G125GD
74HCT2G125GD
Ordering information
Package
Temperature range Name
40 C to +125 C
40 C to +125 C
40 C to +125 C
The 74HC2G125; 74HCT2G125 is a high-speed, Si-gate CMOS device.
The 74HC2G125; 74HCT2G125 provides two non-inverting buffer/line drivers with 3-state
output. The 3-state output is controlled by the output enable input (pin nOE). A HIGH level
at pin nOE causes the output to assume a high-impedance OFF-state.
The bus driver output currents are equal compared to the 74HC125 and 74HCT125.
I
I
I
I
I
I
I
I
74HC2G125; 74HCT2G125
Dual buffer/line driver; 3-state
Rev. 04 — 4 July 2008
Wide supply voltage range from 2.0 V to 6.0 V
Symmetrical output impedance
High noise immunity
Low power consumption
Balanced propagation delays
ESD protection:
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
N
N
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
TSSOP8
VSSOP8
XSON8U
Description
plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
plastic very thin shrink small outline package; 8 leads;
body width 2.3 mm
plastic extremely thin small outline package; no leads;
8 terminals; UTLP based; body 3
2
0.5 mm
Product data sheet
Version
SOT505-2
SOT765-1
SOT996-2

Related parts for 74HCT2G125DC,125

74HCT2G125DC,125 Summary of contents

Page 1

Dual buffer/line driver; 3-state Rev. 04 — 4 July 2008 1. General description The 74HC2G125; 74HCT2G125 is a high-speed, Si-gate CMOS device. The 74HC2G125; 74HCT2G125 provides two non-inverting buffer/line drivers with 3-state output. The 3-state output is controlled ...

Page 2

... NXP Semiconductors 4. Marking Table 2. Marking Type number 74HC2G125DP 74HCT2G125DP 74HC2G125DC 74HCT2G125DC 74HC2G125GD 74HCT2G125GD 5. Functional diagram 1OE 2OE mce185 Fig 1. Logic symbol 6. Pinning information 6.1 Pinning 74HC2G125 74HCT2G125 1 1OE GND 4 001aae074 Fig 4. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8) 74HC_HCT2G125_4 Product data sheet 74HC2G125 ...

Page 3

... NXP Semiconductors 6.2 Pin description Table 3. Pin description Symbol Pin 1OE, 2OE GND 4 1Y Functional description [1] Table 4. Function table Control nOE [ HIGH voltage level LOW voltage level don’t care high-impedance OFF-state. 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). ...

Page 4

... NXP Semiconductors 9. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/ V input transition rise and fall rate V 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V) ...

Page 5

... NXP Semiconductors Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). All typical values are measured at T Symbol Parameter Conditions I supply current input capacitance I C output O capacitance 74HCT2G125 V HIGH-level input V IH voltage V LOW-level input V IL voltage V HIGH-level V OH output voltage V LOW-level output ...

Page 6

... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); C Symbol Parameter Conditions t enable time nOE to nY; see disable time nOE to nY; see dis transition see Figure 6 t time power per buffer dissipation output enabled ...

Page 7

... NXP Semiconductors 12. Waveforms Measurement points are given in Logic levels: V and Fig 6. Propagation delays data input (nA) to output (nY) nOE input output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH Measurement points are given in Logic levels: V and Fig 7. Enable and disable times Table 9. Measurement points Type ...

Page 8

... NXP Semiconductors negative positive Test data is given in Table Definitions test circuit Termination resistance should be equal to output impedance Load capacitance including jig and probe capacitance Load resistance Test selection switch. Fig 8. Load circuitry for measuring switching times Table 10. Test data Type Input ...

Page 9

... NXP Semiconductors 13. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0 pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0.95 mm 1.1 0.25 0.00 0.75 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. ...

Page 10

... NXP Semiconductors VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2 pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0. 0.12 0.00 0.60 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...

Page 11

... NXP Semiconductors XSON8U: plastic extremely thin small outline package; no leads; 8 terminals; UTLP based; body 0.5 mm terminal 1 index area DIMENSIONS (mm are the original dimensions) A UNIT max 0.05 0.35 2.1 mm 0.5 0.00 0.15 1.9 OUTLINE VERSION IEC SOT996 Fig 11. Package outline SOT996-2 (XSON8U) ...

Page 12

... Release date 74HC_HCT2G125_4 20080704 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Section • Added type numbers 74HC2G125GD and 74HCT2G125GD (XSON8U package) ...

Page 13

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 14

... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 14 Abbreviations ...

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