74LVC646APW,112 NXP Semiconductors, 74LVC646APW,112 Datasheet

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74LVC646APW,112

Manufacturer Part Number
74LVC646APW,112
Description
IC TRANSCVR 8BIT N-INV 24TSSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet

Specifications of 74LVC646APW,112

Logic Type
Transceiver, Non-Inverting
Number Of Elements
1
Number Of Bits Per Element
8
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
24-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LVC646APW
74LVC646APW
935250590112
1. General description
2. Features
The 74LVC646A is a high-performance, low-power, low-voltage, Si-gate CMOS device
and superior to most advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3 V or 5 V devices. In 3-state operation, outputs can
handle 5 V. This feature allows the use of these devices as translators in a mixed 3.3 V
and 5 V environment.
The 74LVC646A consists of non-inverting bus transceiver circuits with 3-state outputs,
D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly
from the internal registers. Data on the A or B bus will be clocked in the internal registers,
as the appropriate clock (CPAB or CPBA) goes to a HIGH logic level. Output enable (OE)
and direction (DIR) inputs are provided to control the transceiver function. In the
transceiver mode, data present at high-impedance port may be stored in either the A or B
register, or in both. With the select source inputs (SAB and SBA) stored and real-time
(transparent mode) data can be multiplexed. The direction (DIR) input determines which
bus will receive data when OE is active (LOW). In the isolation mode (OE = HIGH), A data
may be stored in the B register and/or B data may be stored in the A register. When an
output function is disabled, the input function is still enabled and may be used to store and
transmit data. Only one of the two buses A or B may be driven at a time.
74LVC646A
Octal bus transceiver/register; 3-state
Rev. 04 — 29 June 2004
5 V tolerant inputs/outputs for interfacing with 5 V logic
Supply voltage range from 1.2 V to 3.6 V
Complies with JEDEC standard JESD8-B/JESD36
CMOS low-power consumption
Direct interface with TTL levels
8-bit octal transceiver with D-type latch
Back-to-back registers for storage
Separate controls for data flow in each direction
Supports partial power-down applications; inputs/outputs are high-impedance when
V
ESD protection:
Specified from 40 C to +85 C and 40 C to +125 C.
CC
HBM EIA/JESD22-A114-B exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
= 0 V
Product data sheet

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74LVC646APW,112 Summary of contents

Page 1

Octal bus transceiver/register; 3-state Rev. 04 — 29 June 2004 1. General description The 74LVC646A is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 ...

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Philips Semiconductors 3. Quick reference data Table 1: GND = Symbol PHL PLH f max I [ input frequency in MHz; ...

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Philips Semiconductors 5. Functional diagram Fig 1. Functional diagram. 9397 750 13249 Product data sheet Octal bus transceiver/register; 3-state DIR 2 ...

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Philips Semiconductors Fig 2. Logic symbol. 9397 750 13249 Product data sheet CPAB CPBA 2 22 SAB SBA ...

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Philips Semiconductors SBA CPBA SAB CPAB Fig 4. Logic diagram. 9397 750 13249 Product data sheet OE DIR identical channels Rev. 04 — 29 June 2004 74LVC646A Octal bus transceiver/register; 3-state S Y ...

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Philips Semiconductors 6. Pinning information 6.1 Pinning Fig 5. Pin configuration. 6.2 Pin description Table 3: Symbol CPAB SAB DIR GND 9397 750 ...

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Philips Semiconductors Table 3: Symbol SBA CPBA Functional description 7.1 Function table Table 4: Input [ unspecified HIGH voltage level LOW voltage ...

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Philips Semiconductors Table 5: In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol GND T stg P tot [1] The input and output voltage ratings ...

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Philips Semiconductors Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter I input leakage current LI I 3-state output OFF-state current OZ I power-off leakage supply current off I quiescent ...

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Philips Semiconductors 11. Dynamic characteristics Table 8: Dynamic characteristics GND = 0 V; see Figure 11 for test circuit. Symbol Parameter [ +85 C amb propagation delay An Bn, An ...

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Philips Semiconductors Table 8: Dynamic characteristics GND = 0 V; see Figure 11 for test circuit. Symbol Parameter t hold time An CPAB, CPBA h f maximum clock pulse frequency max t skew sk(0) C power dissipation capacitance ...

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Philips Semiconductors Table 8: Dynamic characteristics GND = 0 V; see Figure 11 for test circuit. Symbol Parameter t clock pulse width HIGH or LOW of W CPAB or CPBA t set-up time An CPAB, CPBA su t ...

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Philips Semiconductors 12. Waveforms Fig 6. Input (An and Bn) to output (Bn and An) propagation delays. Table 9: Supply voltage V CC < 2.7 V 2.7 V Fig 7. The An CPAB, CPBA set-up and hold times, ...

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Philips Semiconductors Fig 8. The input SAB and SBA to output Bn and An propagation delay times. Fig 9. The input OE to output An and Bn 3-state enable and disable times. Table 10: Supply voltage V CC < 2.7 ...

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Philips Semiconductors Fig 10. The input showing the input DIR to output An, Bn 3-state enable and disable times. 9397 750 13249 Product data sheet V I DIR input V M GND t PHZ output GND t ...

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Philips Semiconductors Fig 11. Load circuitry for switching times. Table 11: Supply voltage V CC 1.2 V 2 3.6 V [1] The circuit performs better when R 9397 750 13249 Product data sheet V I PULSE ...

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Philips Semiconductors 13. Application information Fig 12. Real-time transfer; bus B to bus A. Table 12: Direction Bus B to bus A Bus A to bus B 9397 750 13249 Product data sheet inputs 001aab049 Values for inputs are given ...

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Philips Semiconductors Fig 14. Bus A and bus B to storage. Table 13: Function Bus A to storage Bus B to storage Bus A and B to storage Storage to bus A Storage to bus B 9397 750 13249 Product ...

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Philips Semiconductors 14. Package outline SO24: plastic small outline package; 24 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT ...

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Philips Semiconductors SSOP24: plastic shrink small outline package; 24 leads; body width 5 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. ...

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Philips Semiconductors TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm ...

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Philips Semiconductors 15. Revision history Table 14: Revision history Document ID Release date 74LVC646A_4 20040629 • Modifications: The format of this data sheet has been redesigned to comply with the new presentation and information standard of Philips Semiconductors • Table ...

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Philips Semiconductors 16. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...

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Philips Semiconductors 20. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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