L6229 STMicroelectronics, L6229 Datasheet - Page 13

• Manufacturer Part Number: L6229
• Description: DMOS DRIVER FOR THREE-PHASE BRUSHLESS DC MOTOR
• Manufacturer: STMicroelectronics

3.5 DECODING LOGIC
The Decoding Logic section is a combinatory logic that provides the appropriate driving of the three-phase
bridge outputs according to the signals coming from the three Hall Sensors that detect rotor position in a 3-
phase BLDC motor. This novel combinatory logic discriminates between the actual sensor positions for sensors
spaced at 60, 120, 240 and 300 electrical degrees. This decoding method allows the implementation of a uni-
versal IC without dedicating pins to select the sensor configuration.
There are eight possible input combinations for three sensor inputs. Six combinations are valid for rotor posi-
tions with 120 electrical degrees sensor phasing (see Figure 15, positions 1, 2, 3a, 4, 5 and 6a) and six combi-
nations are valid for rotor positions with 60 electrical degrees phasing (see Figure 17, positions 1, 2, 3b, 4, 5
and 6b). Four of them are in common (1, 2, 4 and 5) whereas there are two combinations used only in 120 elec-
trical degrees sensor phasing (3a and 6a) and two combinations used only in 60 electrical degrees sensor phas-
ing (3b and 6b).
The decoder can drive motors with different sensor configuration simply by following the Table 8. For any input
configuration (H
tion 3a is the same than 3b and analogously output configuration 6a is the same than 6b.
The sequence of the Hall codes for 300 electrical degrees phasing is the reverse of 60 and the sequence of the
Hall codes for 240 phasing is the reverse of 120. So, by decoding the 60 and the 120 codes it is possible to drive
the motor with all the four conventions by changing the direction set.
Table 8. 60 and 120 Electrical Degree Decoding Logic in Forward Direction.
Figure 15. 120° Hall Sensor Sequence.
Hall 120°
Phasing
Hall 60°
H
OUT
OUT
OUT
3
H
H
H
= H
1
2
3
1
2
3
H
1
1
High Z
= L
GND
1->3
1
H
Vs
, H
H
L
L
1
1
2
2
H
and H
3
High Z
3
H
2
GND
2->3
) there is one output configuration (OUT
1
Vs
H
H
2
2
L
H
2
H
3
High Z
GND
2->1
3a
Vs
H
L
L
-
3a
H
1
H
2
High Z
GND
2->1
Vs
3b
H
H
H
-
H
3
H
4
1
High Z
GND
3->1
1
Vs
H
H
4
4
L
, OUT
H
2
H
2
3
and OUT
High Z
GND
3->2
5
Vs
H
H
5
5
L
L
1
3
). The output configura-
H
2
High Z
GND
1->2
H
Vs
6a
H
H
3
L
-
6a
H
1
High Z
GND
L6229
1->2
6b
Vs
L
L
L
-
13/25
H
2