S1D10605 Epson Electronics America, Inc., S1D10605 Datasheet - Page 134

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S1D10605

Manufacturer Part Number
S1D10605
Description
S1d15000 Series Lcd Driver With Ram
Manufacturer
Epson Electronics America, Inc.
Datasheet
S1D15300 Series
Column Address Counter
This is a 8 bit presettable counter that provides column address to the
display RAM (refer to Figure 4). It is incremented by 1 when a Read/
Write command is entered. However, the counter is not incremented
but locked if a non-existing address above 84H is specified. It is
unlocked when a column address is set again. The Column Address
counter is independent of Page Address register.
When ADC Select command is issued to display inverse display, the
column address decoder inverts the relationship between RAM
column address and display segment output.
Page Address Register
This is a 4-bit page address register that provides page address to the
display RAM (refer to Figure 4). The microprocessor issues Set
Page Address command to change the page and access to another
page. Page address 8 (D3 is high, but D2, D1 and D0 are low) is
5–10
D0
D1
D2
D3
D4
1
0
1
0
0
Display data RAM
EPSON
Figure 3
RAM area dedicate to the indicator, and display data D0 is only
valid.
Display Data RAM
The display data RAM stores pixel data for LCD. It is a 65-column
by 132-row (8-page by 8 bit+1) addressable array. Each pixel can
be selected when page and column addresses are specified.
The time required to transfer data is very short because the micro-
processor enters D0 to D7 corresponding to LCD common lines as
shown in Figure 3. Therefore, multiple S1D15300 can easily
configure a large display having the high flexibility with very few
data transmission restriction.
The microprocessor writes and reads data to/from the RAM through
I/O buffer. As LCD controller operates independently, data can be
written into RAM at the same time as data is being displayed,
without causing the LCD to flicker.
COM0
COM1
COM2
COM3
COM4
Display on LCD
Rev.1.4

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