S1D10605 Epson Electronics America, Inc., S1D10605 Datasheet - Page 223

• Manufacturer Part Number: S1D10605
• Description: S1d15000 Series Lcd Driver With Ram
• Manufacturer: Epson Electronics America, Inc.

S1D15602 Output Status
COM/SEG output status of the S1D15602 is fixed.
1/16 duty (16 150)
Display Timers
Line counter and display data latch
timing
The display clock, CL, provides the timing signals for the
line counter and the display data latch. The RAM line
address is generated synchronously using the display
clock. The display data latch synchronizes the 166-bit
display data with the display clock.
The timing of the LCD panel driver outputs is independ-
ent of the timing of the input data from the microproces-
sor.
FR and SYNC
The LCD AC signal, FR, and the synchronization signal,
SYNC, are generated from the display clock. The FR
controller generates the timing for the LCD panel driver
outputs. Normally, 2-frame wave patterns are generated,
but n-line inverse wave patterns can also be generated.
These produce a high-quality display if n is based on the
LCD panel being used.
SYNC synchronizes the timing of the line counter and
common timers. It is also needed to synchronize the
frame period and a 50% duty clock.
S1D15600/601/602 Series
7–28
00
SEG150
LCD driver output
EPSON
In a multiple-chip configuration, FR and SYNC are
inputs. The SYNC signal from the master synchronizes
the line counter and common timing of the slave.
Common timing signals
The internal common timing and the special-use com-
mon driver start signal, DYO, are generated from CL.
As shown in figures 7 and 8, DYO outputs a HIGH-level
pulse on the rising edge of the CL clock pulse that
precedes a change on SYNC. DYO is generated by both
the S1D15600D0B
in master or slave mode. However, when operating in
slave mode, the device duty and the external SYNC
signal must be the same as that of the master. In a
multiple-chip configuration, FR and SYNC must be
supplied to the slave from the master.
Part number Mode
SD1560
Table 6. Master and slave timing signal status
*
D
**
B
*
0149 150
Master
Slave
15
*
, regardless of whether the device is
Output
Input
FR
COM0
0165
Output
SYNC
Input
impedance
output
CLO
High
CL
Rev. 4.6
Output
Output
DYO