S1D10605 Epson Electronics America, Inc., S1D10605 Datasheet - Page 601

no-image

S1D10605

Manufacturer Part Number
S1D10605
Description
S1d15000 Series Lcd Driver With Ram
Manufacturer
Epson Electronics America, Inc.
Datasheet
S1D15B01 Series
Table 23
Table 24
*1. This is in the case of making the access by WR and RD, setting the CS1=LOW.
*2. This is in the case of making the access by CS1, setting the WR, RD=LOW.
*3. The rise and fall times (tr and tf) of the input signal are specified for less than 15 ns. When using the system cycle
*4. All timings are specified based on the 20 and 80% of V
*5. t
13–46
Address hold time
Address setup time
System cycle time
Control LOW pulse width(Write)
Control LOW pulse width(Read)
Control HIGH pulse width(Write)
Control HIGH pulse width(Read)
Data setup time
Data hold time
Access time
Output disable time
Address hold time
Address setup time
System cycle time
Control LOW pulse width(Write)
Control LOW pulse width(Read)
Control HIGH pulse width(Write)
Control HIGH pulse width(Read)
Data setup time
Data hold time
Access time
Output disable time
time at high speed, they are specified for (tr+tf) < = (t
the LOW level.
CCLW
and t
Item
Item
CCLR
are specified for the overlap period when CS1 is at LOW (CS2=HIGH) level and WR,RD are at
D7 to D0
D7 to D0
Signal
Signal
WR
WR
WR
WR
RD
RD
RD
RD
A0
A0
Symbol
Symbol
EPSON
t
t
t
t
t
t
t
t
t
t
t
t
CCHW
CCHW
CCLW
CCHR
CCLW
CCHR
t
t
CYC8
CCLR
t
t
ACC8
t
t
CYC8
CCLR
t
t
ACC8
t
t
AW8
AW8
OH8
OH8
AH8
DS8
DH8
AH8
DS8
DH8
CYC8
DD
-t
.
CCLW
Condition
CL=100pF
CL=100pF
Condition
) or (tr+tf) < = (t
[V
[V
DD
DD
=2.7V to 4.5V, Ta=–40 to 85 C]
=1.7V to 2.7V, Ta=–40 to 85 C]
CYC8
Min.
Min.
260
120
700
120
240
120
120
60
60
60
35
10
90
10
0
0
0
0
0
0
-t
CCLR
-t
CCHR
Max.
Max.
120
100
240
200
).
Rev. 1.1a
Units
Units
ns
ns

Related parts for S1D10605