N25Q128 Numonyx, N25Q128 Datasheet - Page 112

• Manufacturer Part Number: N25Q128
• Description: 128-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase On Boot Sectors, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
• Manufacturer: Numonyx

Table 22.
112/180
Instruction
MIORDID
DCFR
ROTP
WREN
WRDI
DCPP
POTP
SSE
SE
BE
PER
PES
RDSR
WRSR
RDLR
WRLR
(2)
Program OTP
Enhanced Configuration Register (WRVECR), Write NV Configuration Register
(WRNVCR), Write Enable (WREN) or Write Disable (WRDI) instruction, Chip Select (S)
must be driven High exactly at a byte boundary, otherwise the instruction is rejected, and is
not executed.
All attempts to access the memory array during a Write Status Register cycle, a Write Non
Volatile Configuration Register, a Program cycle or an Erase cycle are ignored, and the
internal Write Status Register cycle, Write Non Volatile Configuration Register, Program
cycle or Erase cycle continues unaffected, the only exception is the Program/Erase
Suspend instruction (PES), that can be used to pause all the program and the erase cycles
but the Program OTP (POT),, Bulk Erase (BE) and Write Non Volatile Configuration
Register. The suspended program or erase cycle can be resumed by mean of the
Program/Erase Resume instruction (PER). During the program/erase cycles also the polling
instructions (to check if the internal modify cycle is finished by mean of the WIP bit of the
Status Register or of the Program/Erase controller bit of the Flag Status register) are also
accepted to allow the application checking the end of the internal modify cycles, of course
these polling instructions don't affect the internal cycles performing.
Instruction set: DIO-SPI protocol (page 1 of 2)
Multiple I/O read identification
Dual Command Fast Read
Read OTP
Write Enable
Write Disable
Dual Command Page Program
SubSector Erase
Sector Erase
Bulk Erase
Program/Erase Resume
Program/Erase Suspend
Read Status Register
Write Status Register
Read Lock Register
Write to Lock Register
Description
0111 1010
0111 0101
1010 1111
1011 1011
1101 0010
0000 1011
0011 1011
0100 1011
0000 0110
0000 0100
0000 0010
1010 0010
0100 0010
0010 0000
1101 1000
1100 0111
0000 0101
0000 0001
1110 1000
1110 0101
Instruction
Code (BIN)
One-byte
AFh
BBh
D2h
Instruction
0Bh
3Bh
4Bh
06h
04h
02h
A2h
42h
20h
D8h
C7h
7Ah
75h
05h
01h
E8h
E5h
One-byte
(HEX)
Code
0
3
3
3
3
3
3
3
3
3
3
3
3
Address
0
0
0
0
0
0
0
bytes
0
8
8
8
8
Dummy
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
(1)
clock
cycle
(1)
(1)
(1)
1 to 3
1 to 256
1 to 256
1 to 256
1 to
1 to
1 to
1 to 65
0
0
1 to 65
0
0
0
0
0
1 to
1
1 to
1
bytes
Data
∞
∞
∞
∞
∞