ST7036 ETC-unknow, ST7036 Datasheet
ST7036
Related parts for ST7036
ST7036 Summary of contents
Page 1
... The maximum display RAM size can be either 80 characters in 1-line display or 40 characters in 2-line display or 16 characters in 3-line. A single ST7036 can display up to one 20-character line or two 20-character lines or three 16-character lines. No extra drivers can be cascaded. ...
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... ST7036 ST7036 Serial Specification Revision History Version Date 0.1a 2003/04/28 1 PAD Dimension: 0.1b 2003/06/ mark location modified Chip Size X/Y modified 0.2a 2003/09/01 1. Include ST7036i 1. Add application circuit for 3 line display. 1.0 2003/10/ bit interface program example modified. 1. Remove the instruction of frequency adjust. 1.1 2003/12/24 2 ...
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... ST7036 Pad Dimensions Chip Size: 5190.0X910.0 µm Bump Pitch : 55 µm ( min ) Bump Height : 17 µm ( typ. ) Bump Size : Pad No.1~ µm Pad No.53~170 : 35 x 101 µm V1.1 3/72 2003/12/24 ...
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... ST7036 Pad Location Coordinates(N3=0 1 line/2 line) Pad No. Function X 1 XRESET 1859 2 OSC 1783 3 VDD 1707 4 RS 1631 5 CSB 1555 6 RW 1479 7 E 1403 8 DB0 1327 9 DB1 1251 10 DB2 1175 11 DB3 1099 12 DB4 1023 13 DB5 947 14 DB6 871 15 DB7 795 16 VSS 719 ...
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... ST7036 Pad No. Function X 81 SEG[20] -1703 82 SEG[21] -1648 83 SEG[22] -1593 84 SEG[23] -1538 85 SEG[24] -1483 86 SEG[25] -1428 87 SEG[26] -1373 88 SEG[27] -1318 89 SEG[28] -1263 90 SEG[29] -1208 91 SEG[30] -1153 92 SEG[31] -1098 93 SEG[32] -1043 94 SEG[33] -988 95 SEG[34] -933 96 SEG[35] -878 97 SEG[36] -823 98 SEG[37] -768 99 SEG[38] ...
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... ST7036 Pad No. Function X 161 SEG[100] 2518 162 COM[9] 2518 163 COM[10] 2518 164 COM[11] 2518 165 COM[12] 2518 166 COM[13] 2518 167 COM[14] 2290 168 COM[15] 2235 169 COM[16] 2180 170 COMI2 2125 V1.1 Y Pad No. Function 90 145 200 255 310 365 378 ...
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... ST7036 Pad Location Coordinates(N3=1 3 line) Pad No. Function X 1 XRESET 1859 2 OSC 1783 3 VDD 1707 4 RS 1631 5 CSB 1555 6 RW 1479 7 E 1403 8 DB0 1327 9 DB1 1251 10 DB2 1175 11 DB3 1099 12 DB4 1023 13 DB5 947 14 DB6 871 15 DB7 795 16 VSS 719 17 VSS ...
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... ST7036 Pad No. Function X 81 SEG[10] -1703 82 SEG[11] -1648 83 SEG[12] -1593 84 SEG[13] -1538 85 SEG[14] -1483 86 SEG[15] -1428 87 SEG[16] -1373 88 SEG[17] -1318 89 SEG[18] -1263 90 SEG[19] -1208 91 SEG[20] -1153 92 SEG[21] -1098 93 SEG[22] -1043 94 SEG[23] -988 95 SEG[24] -933 96 SEG[25] -878 97 SEG[26] -823 98 SEG[27] -768 99 SEG[28] ...
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... ST7036 Pad No. Function X 161 COM[16] 2518 162 COM[17] 2518 163 COM[18] 2518 164 COM[19] 2518 165 COM[20] 2518 166 COM[21] 2518 167 COM[22] 2290 168 COM[23] 2235 169 COM[24] 2180 170 COMI2 2125 V1.1 Y Pad No. Function 90 145 200 255 310 365 378 ...
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... ST7036 Block Diagram XRESET Reset circuit CLS Instruction register(IR) Instruction decoder RS MPU RW interface E CSB PSB PSI2B Data register DB4 to (DR) DB7 Input/ output DB0 to buffer Busy DB3 flag SHLC SHLS EXT áÆ OPR1,2 OPF1,2 VSS VDD V1.1 OSC Timing CPG generator ...
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... VDD. DB4~DB7 are four high order bi-directional data bus pins. DB4~DB7 are used for data transfer and receive between the MPU and the ST7036. DB7 can be used as a busy flag. MPU In serial interface mode DB7 is SI(input data),DB6 is SCL(serial clock). ...
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... ST7036 Name Number I/O Interfaced with OPR1,OPR2 2 I SHLC 1 I SHLS 1 I COM1 COM16 COMI2 1 O COMI1 Seg1~Seg10 21 O Seg91~Seg100 SEG11 SEG90 OPF1,OPF2 2 I CAP1P 2 - CAP1N 2 - VIN 2 - VOUT VDD,VSS 4,5 - CLS 1 I OSC 1 I TEST1 1 I/O V1.1 Character generator select: ...
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... ST7036 EXT option pin difference table Normal mode (EXT=1) Mode ( Instruction compatible to ST7066U ) Difference Booster Always OFF Can’t use the follower circuit Bias (V0~V4) Only use external resistor or internal resistor(1/5 bias) Contrast adjust Control by external VR ICON RAM Can’t be use Instruction Control normal instruction similar to ST7066U ...
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... Table 1. Various kinds of operations according to RS and R/W bits interface It just only could write Data or Instruction to ST7036 by the IIC Interface. It could not read Data or Instruction from ST7036 (except Acknowledge signal). SCL: serial clock input SDA_IN: serial data input SDA_OUT: acknowledge response output Slaver address could set from “ ...
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... ST7036 · Arbitration: procedure to ensure that, if more than one master simultaneously tries to control the bus, only one is allowed and the message is not corrupted · Synchronization: procedure to synchronize the clock signals of two or more devices. A CKNOWLEDGE Acknowledge signal (ACK) is not BF signal in parallel interface. ...
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... RAM at the address specified by the data pointer. The data pointer is automatically updated and the data is directed to the intended ST7036i device. If the RS bit of the last control byte is set to logic 0, these command bytes will be decoded and the setting of the device will be changed according to the received commands ...
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... S 1 byte 2n>=0 bytes command word control byte Fig .5 IIC Interface protocol Operation 17/72 acknowledgement acknowledgement from ST7036i from ST7036i A data byte A P n>=0 bytes MSB.......................LSB data byte ...
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... When there are fewer than 80 display characters, the display begins at the head position. For example, if using only the ST7036, 20 characters are displayed. See Figure 7. When the display shift operation is performed, the DDRAM address shifts. See Figure 8. High order bits ...
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... Note that the first line end address and the second line start address are not consecutive. For example, when just the ST7036 is used, 20 characters x 2 lines are displayed. See Figure 9. When display shift operation is performed, the DDRAM address shifts. See Figure 10. ...
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... Case 1: When the number of display characters is less than 16 x 3 lines, the tree lines are displayed from the head. For example, when just the ST7036 is used, 16 characters x 3 lines are displayed. See Figure 11. When display shift operation is performed, the DDRAM address shifts. See Figure 12. ...
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... ST7036 Character Generator ROM (CGROM) The character generator ROM generates dot character patterns from 8-bit character codes. It can generate 240/250/248/256 dot character patterns(select by OPR1/2 ITO pin). User-defined character patterns are also available by mask-programmed ROM. Character Generator RAM (CGRAM) In the character generator RAM, the user can rewrite character patterns by program. For dots, eight character patterns can be written ...
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... ST7036 Table 4 Correspondence between Character Codes and Character Patterns V1.1 22/72 2003/12/24 ...
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... ST7036 CGRAM/CGROM arrangement with (OPR1, OPR2)= V1.1 23/72 2003/12/24 ...
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... ST7036 Character Code (DDRAM Data Table 5 Relationship between CGRAM Addresses, Character Codes (DDRAM) and Character Notes: 1. Character code bits correspond to CGRAM address bits bits: 8 types). ...
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... ST7036 When SHLS=1, ICON RAM map refer below table ICON address D7 D6 00H - - 01H - - 02H - - 03H - - 04H - - 05H - - 06H - - 07H - - 08H - - 09H - - 0AH - - 0BH - - 0CH - - 0DH - - 0EH - - 0FH - - When SHLS=0, ICON RAM map refer below table ICON address D7 D6 00H - - 01H ...
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... RAM Note: Be sure the ST7036 is not in the busy state ( before sending an instruction from the MPU to the ST7036 instruction is sent without checking the busy flag, the time between the first instruction and next instruction will take much longer than the instruction time itself. Refer to Instruction Table for the list of each instruction execution time ...
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... ST7036 instruction table at “Extension mode” (when “EXT” option pin connect to V Instruction Code Instruction RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Clear Display Return Home Entry Mode Set Display ON/OFF ...
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... ST7036 Cursor Display Shift Set CGRAM AC5 AC4 AC3 AC2 AC1 AC0 Bias Set Set ICON Address Power/ICON Control Contrast Set Follower Control Contrast Set Double Height ...
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... ST7036 Instruction Description Clear Display RS R Clear all the display data by writing "20H" (space code) to all DDRAM address, and set DDRAM address to "00H" into AC (address counter). Return cursor to the original status, namely, bring the cursor to the left edge on first line of the display. Make entry mode increment (I/D = "1"). ...
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... ST7036 Display ON/OFF RS R Control display/cursor/blink ON/OFF 1 bit register Display ON/OFF control bit When D = "High", entire display is turned on. When D = "Low", display is turned off, but display data is remained in DDRAM Cursor ON/OFF control bit When C = "High", cursor is turned on. When C = "Low", cursor is disappeared in current display, but I/D register remains its data. ...
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... ST7036 Function Set RS R Interface data length control bit When DL = "High", it means 8-bit bus mode with MPU. When DL = "Low", it means 4-bit bus mode with MPU speak signal to select 8-bit or 4-bit bus mode. When 4-bit bus mode, it needs to transfer 4-bit data by two times. ...
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... ST7036 IS[2:1]: instruction table select When IS[2:1]=(0,0): normal instruction be selected(refer instruction table 0) When IS[2:1]=(0,1):extension instruction be selected(refer instruction table 1 ) When IS[2:1]=(1,0):extension instruction be selected(refer instruction table 2 ) When IS[2:1]=(1,1):Do not use (reserved for test) Double height position set: IS[2:1]=(1, UD: Select double height font display position of screen.(N3=VDD) When UD = " ...
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... ST7036 3 Line mode normal display ( don`t care ) COM1 ..8 is normal , COM9 .. double height font ( COM17 ..24 is normal , COM1 .. double height font ( V1.1 33/72 2003/12/24 ...
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... ST7036 Set CGRAM Address RS R Set CGRAM address to AC. This instruction makes CGRAM data available from MPU. Set DDRAM Address RS R Set DDRAM address to AC. This instruction makes DDRAM data available from MPU. When 1-line display mode (N = 0), DDRAM address is from "00H" to "4FH". ...
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... ST7036 Write Data to CGRAM,DDRAM or ICON RAM RS R Write binary 8-bit data to CGRAM,DDRAM or ICON RAM The selection of RAM from DDRAM, CGRAM or ICON RAM, is set by the previous address set instruction : DDRAM address set, CGRAM address set, ICON RAM address set. RAM set instruction can also determine the AC direction to RAM ...
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... ST7036 Bias Set BS: bias selection When BS=”High”, the bias will be 1/4 When BS=”Low”, the bias will be 1/5 BS will be invalid when external bias resistors are used(OPF1=1,OPF2=1) FX: must be fixed on high in 3-line application and fixed on low in other applications. Set ICON RAM address Set ICON RAM address to AC ...
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... ST7036 Follower control RS R Fon: switch follower circuit Fon can only be set when internal follower is used (OPF1=0,OPF2=0). When Fon = "High", internal follower circuit is turn on. When Fon = "Low", internal follower circuit is turn off. Note that Fon must be set to “Low” if (OPF1, OPF2) is not (0,0). ...
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... If the electrical characteristics conditions listed under the table Power Supply Conditions Using Internal Reset Circuit are not met, the internal reset circuit will not operate normally and will fail to initialize the ST7036. When internal Reset Circuit not operate,ST7036 can be reset by XRESET pin from MPU control signal. V1.1 38/72 ...
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... ST7036 Initializing by Instruction 8-bit Interface (fosc=380kHz / V1 tim e > ...
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... ST7036 Initial Program Code Example For 8051 MPU(8 Bit Interface): ;--------------------------------------------------------------------------------- INITIAL_START: CALL DELAY40mS MOV A,#38H ;FUNCTION SET CALL WRINS_NOCHK ;8 bit, N=1,5*7dot CALL DELAY30uS MOV A,#38H ;FUNCTION SET CALL WRINS_NOCHK ;8 bit, N=1,5*7dot CALL DELAY30uS MOV A,#14H ;set bias CALL WRINS_CHK CALL DELAY30uS ...
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... ST7036 4-bit Interface (fosc=380kHz) V1.1 41/72 2003/12/24 ...
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... ST7036 Initial Program Code Example For 8051 MPU(4 Bit Interface): ;------------------------------------------------------------------- INITIAL_START: CALL DELAY40mS MOV A,#30H ; FUNCTION SET CALL WRINS_ONCE ; 8 bit CALL DELAY2mS MOV A,#30H ; FUNCTION SET CALL WRINS_ONCE ; 8 bit CALL DELAY30uS MOV A,#30H ; FUNCTION SET CALL WRINS_ONCE ; 8 bit CALL ...
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... ST7036 Serial interface & IIC interface ( fosc = 380kHz ) POWER ON and external reset Wait time >40mS After VDD stable Function set RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Wait time >26.3ôS Function set RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 ...
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... ST7036 Initial Program Code Example For 8051 MPU ( Serial Interface ) : ;--------------------------------------------------------------------------------- INITIAL_START: CALL HARDWARE_RESET CALL DELAY40mS MOV A,#38H ;FUNCTION SET CALL WRINS_NOCHK ;8 bit, N=1,5*7dot CALL DELAY30uS MOV A,#39H ;FUNCTION SET CALL WRINS_NOCHK ;8 bit, N=1,5*7dot,IS=1 CALL DELAY30uS MOV A,#14H ;bias CALL WRINS_NOCHK CALL ...
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... For 4-bit interface data, only four bus lines (DB4 to DB7) are used for transfer. Bus lines DB0 to DB3 are disabled. The data transfer between the ST7036 and the MPU is completed after the 4-bit data has been transferred twice. As for the order of data transfer, the four high order bits (for 8-bit operation, DB4 to DB7) are transferred before the four low order bits (for 8-bit operation, DB0 to DB3) ...
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... Busy flag Busy flag check check Ë DB0 to DB7 P3.0 RS P3.1 R/W P3.2 E SEG100/80 P3.3 CSB ST7036 46/72 xxxxxxx xxxxxxxxxx xxxxxxx xxxxxxxxxx Not xxxxxxx xxxxxxxxxx Data xxxxxxx xxxxxxxxxx Busy xxxxxxx xxxxxxxxxx xxxxxxx xxxxxxxxxx Busy flag Instruction check write 16/24 COM1 to ...
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... For serial interface data, only two bus lines (DB6 to DB7) are used. Example of timing sequence CSB SCL 1 RS Intel 8051 interface ( Serial 4-line ) P1.6 to P1.7 Intel 8051 Serial V1 SCL P3.0 RS P3.3 CSB SEG100/80 ST7036 47/ 16/24 COM1 to COM16/24 SEG1 to 100/80 2003/12/ ...
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... ST7036 2 For interface data, all eight bus lines (DB0 to DB7) are used Example of timing sequence SDA D7 D6 SCL Intel 8051 interface ( interface ) 48/72 Á³Á³Á³Á³Á³Á³Á³ ...
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... ST7036 Supply Voltage for LCD Drive When external bias resistors are used (OPF1=1,OPF2= (2.7~ 5.5V) VDD OPF1 OPF2 VOUT V0 VIN CAP1P V1 CAP1N VSS 1/4 bias When built-in bias resistors(9.6K ) are used (OPF1=1,OPF2=0) V1.1 Vext OPF1 OPF2 VR VOUT VIN R CAP1P CAP1N R VLCD ...
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... ST7036 When built-in bias resistors(3.3K ) are used (OPF1=0,OPF2=1) When built-in voltage followers with external Vout are used (OPF1=0,OPF2=0 and instruction setting Bon=0,Fon=1) V Vext j V0 VOUT VIN CAP1P CAP1N OPF1 OPF2 V1.1 V Vext CC (2.7~ 5.5V) VDD OPF2 VOUT VR V0 VIN V1 CAP1P V2 CAP1N ...
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... Ensure V0 level stable, that must let |Vout-V0| over 0.5V(if panel size over 4.5”,the |Vout-V0| propose over 0.8V GND (System side) V1.1 Don't need to connect stable capacitor when use internal follower circuit VOUT 2xV VLCD 2 x step-up voltage relationships GND |Vout-V0|>0.5V(minimum) Vout (ST7036Side) 51/ DD=2.7~3.5V V SS= 2003/12/24 ...
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... ST7036 V0 voltage follower value calculation V Vout Vref level (Condition:Booster on, Follower on, VIN=3 ...
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... ST7036 level (Condition: VDD=5.0V, external Vout=7.0V) The recommended curve: followe=01H Notes: 1. Vout Vss must be maintained the calculation value higher than Vout, the real V0 value will saturate to Vout. ...
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... ST7036 AC Characteristics 68 Interface RS R/W tAW6 CSB (Write (Read) Item Signal Address hold time RS Address setup time RS System cycle time RS Data setup time Data hold time Access time Output disable time Enable H pulse time E Enable L pulse time ...
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... ST7036 Serial Interface CSB RS SCL SI Item Signal Serial Clock Period SCL SCL “H” pulse width SCL “L” pulse width Address setup time RS Address hold time Data setup time SI Data hold time CS-SCL time CS *1 All timing is specified using 20% and 80 ...
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... ST7036 I2C interface SDA t BUF SCL SDA Item SCL clock frequency SCL clock low period SCL clock high period Data set-up time Data hold time SCL,SDA rise time SCL,SDA fall time Capacitive load represent by each bus line Setup time for a repeated START ...
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... ST7036 Internal Power Supply Reset 2.7V/4.5V 0.2V t rcc 0.1mS trcc 10mS Notes: t compensates for the power oscillation period caused by momentary power supply OFF oscillations. Specified at 4.5V for 5V operation, and at 2.7V for 3V operation. For if 2.7V/4.5V is not reached during 3V/5V operation, internal reset circuit will not operate normally. Hardware reset(XRESET) ...
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... ST7036 Absolute Maximum Ratings Characteristics Power Supply Voltage LCD Driver Voltage Input Voltage Operating Temperature Storage Temperature DC Characteristics ( VDD = 2.7 V) Symbol Characteristics VDD Operating Voltage V LCD Voltage LCD VIN Power Supply I Power Supply Current CC Input High Voltage V IH1 (Except OSC1) Input Low Voltage ...
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... ST7036 DC Characteristics ( VDD = 4.5 V) Symbol Characteristics VDD Operating Voltage V LCD Voltage LCD VIN Power Supply I Power Supply Current CC Input High Voltage V IH1 (Except OSC1) Input Low Voltage V IL1 (Except OSC1) Input High Voltage V IH2 (OSC1) Input Low Voltage V IL2 (OSC1) Output High Voltage ...
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... ST7036 LCD Frame Frequency 1/16 Duty(ST7066U normal mode); Assume the oscillation frequency is 540KHZ, 1 clock cycle time = 1.85us, 1/16 duty; 1/5 bias,1 frame =1.85us x 200 5.92ms=168.9Hz(SHLC and SHLS connect to High) 200 clocks COM1 V3 V4 Vss COM2 V3 V4 Vss COM16 ...
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... ST7036 1/17 Duty(Extension mode); Assume the oscillation frequency is 540KHZ, 1 clock cycle time = 1.85us, 1/17 duty; 1/5 bias,1 frame =1.85us x 200 6.29ms=159Hz(SHLC and SHLS connect to High) 200 clocks COM1 V3 V4 Vss COM2 V3 V4 Vss COM17 V3 V4 Vss SEGx off ...
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... ST7036 1/8 Duty(ST7066U normal mode); Assume the oscillation frequency is 540KHZ, 1 clock cycle time = 1.85us, 1/8 duty; 1/4 bias,1 frame = 1.85us x 400 5.92ms=168.9Hz(SHLC and SHLS connect to High) 400 clocks COM1 V3 V4 Vss COM2 V3 V4 Vss COM8 V3 V4 Vss V0 V1 ...
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... ST7036 1/9 Duty(Extension mode); Assume the oscillation frequency is 540KHZ, 1 clock cycle time = 1.85us, 1/9 duty; 1/4 bias,1 frame = 1.85us x 400 6.66ms=150Hz(SHLC and SHLS connect to High) 400 clocks COM1 V3 V4 Vss COM2 V3 V4 Vss COM9 V3 V4 Vss SEGx off ...
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... ST7036 1/25 Duty( Extension mode and 3-line ); Assume the oscillation frequency is 540KHZ, 1 clock cycle time = 1.85us, 1/25 duty; 1/4 bias,1 frame = 1.85us x 160 7.40ms=135.1Hz(SHLC and SHLS connect to High) 160 clocks COM1 V3 V4 Vss COM2 V3 V4 Vss COM25 V3 V4 ...
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... ST7036 I/O Pad Configuration V DD PMOS NMOS Input PAD (No Pull up): RS, R/W, XRESET, CSB, PSB, OPFx, OPRx, SHLx, CLS, EXT V DD PMOS V1 PSB PSB=1==>E(Floating) PSB=0==>E(Pull up PMOS PMOS NMOS NMOS I/O PAD (Pull up): DB0-DB5 65/ PMOS NMOS Enable Data 2003/12/24 ...
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... ST7036 LCD and ST7036 Connection SHLC/SHLS ITO option pin can select at different direction for LCD panel Com normal direction/Seg normal direction 3 line x 16 characters, SHLC=1 SHLS=1 Com normal direction/Seg reverse direction 3 line x 16 characters, SHLC=1, SHLS=0 Com reverse direction/Seg normal direction ...
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... Use internal resistor(9.6K ohm) and contrast adjust with external VR. Booster always off. Has 240 character of CGROM. Internal oscillator. Dot Matrix LCD Panel Vext VDD Com 1-24 VOUT VIN CAP1N CAP1P RS,R/W,E,CSB,DB0-DB7,XRESET V1.1 Seg 1-80 ST7036 To MPU 67/72 VDD CLS SHLC SHLS N3 EXT OPF1 OPF2 OPR1 OPR2 2003/12/24 ...
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... ST7036 Application Circuit(Extension mode) Use internal follower circuit. Booster has 2 times pump. Has 240 character of CGROM. Internal oscillator atrix anel V ext 0 When the heavy load is applied, the dotted line part could be added ...
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... ST7036 Application Circuit ( for glass layout ) ST7036 over Glass,6800 serial 8bit interface, with booster and follower circuit on V1.1 69/72 2003/12/24 ...
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... ST7036 ST7036 over Glass,6800 serial 4bit interface, with booster and follower circuit on V1.1 70/72 2003/12/24 ...
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... ST7036 ST7036 over Glass, serial interface, with booster and follower circuit on V1.1 71/72 2003/12/24 ...
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... ST7036 2 ST7036 over Glass interface, with booster and follower circuit on V1.1 72/72 2003/12/24 ...