VNQ500PEP STMicroelectronics, VNQ500PEP Datasheet - Page 8

• Manufacturer Part Number: VNQ500PEP
• Description: Quad Channel High Side Driver
• Manufacturer: STMicroelectronics

VNQ500PEP
APPLICATION SCHEMATIC
GND
REVERSE BATTERY
Solution 1: Resistor in the ground line (R
can be used with any type of load.
The following is an indication on how to dimension the
R
where -I
be found in the absolute maximum rating section of the of
the device’s datasheet.
Power Dissipation in R
battery situations) is:
P
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
calculated with formula (1) where I
sum of the maximum on-state currents of the different
devices.
Please note that if the microprocessor ground is not
common with the device ground then the R
produce a shift (I
and the status output values. This shift will vary
depending on many devices are ON in the case of several
high side drivers sharing the same R
If the calculated power dissipation leads to a large resistor
or several devices have to share the same resistor then
the ST suggest to utilize Solution 2 (see below).
Solution 2: A diode (D
A resistor (R
D
8/11
1
GND
D
GND
1) R
2) R
= (-V
GND
GND
resistor.
if the device will be driving an inductive load.
CC
GND
PROTECTION
)
+5V
2
/R
C
600mV / (I
is the DC reverse ground pin current and can
GND
GND
V
CC
S(on)max
=1k
) / (-I
GND
GND
S(on)max
R
GND
R
should be inserted in parallel to
prot
prot
* R
) in the ground line.
)
(when V
NETWORK
GND
).
) in the input thresholds
S(on)max
CC
GND
<0: during reverse
CE
I/0n
.
GND
becomes the
AGAINST
only). This
GND
will
V
GND
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
the ground network will produce a shift (
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
LOAD DUMP PROTECTION
D
load dump peak voltage exceeds V
same applies if the device will be subject to transients on
the V
ISO T/R 7637/1 table.
If a ground protection network is used and negative
transient are present on the V
be pulled negative. ST suggests to insert a resistor (R
in line to prevent the C I/Os pins to latch-up.
The value of these resistors is a compromise between the
leakage current of
HSD I/Os (Input levels compatibility) with the latch-up limit
of C I/Os.
Calculation example:
For V
5k
Recommended R
C I/Os PROTECTION:
ld
-V
is necessary (Voltage Transient Suppressor) if the
CCpeak
R
GND
CC
CCpeak
GND
R
prot
line that are greater than the ones shown in the
/I
latchup
= - 100V and I
V
65k .
CC
D
prot
GND
R
value is 10k
C and the current required by the
prot
OUTPUT
latchup
(V
OH C
CC
line, the control pins will
CC
-V
20mA; V
IH
max DC rating. The
-V
GND
j
600mV) in the
OH C
) / I
D
ld
IHmax
4.5V
prot
)