STPIC44L02 STMicroelectronics, STPIC44L02 Datasheet

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STPIC44L02

Manufacturer Part Number
STPIC44L02
Description
4 CHANNEL SERIAL AND PARALLEL LOW SIDE PRE-FET DRIVER
Manufacturer
STMicroelectronics
Datasheet
www.DataSheet4U.com
DESCRIPTION
The STPIC44L02 is a low-side predriver that
provides serial and parallel input interfaces to
control four external FET power switches.
It is mainly designed to provide low-frequency
switching, inductive load applications such as
solenoids and relays. Fault status is available in a
serial-data format. Each driver channel has
independent off-state open-load detection and
on-state shorted load short to battery detection.
The STPIC44L02 offers a battery over voltage and
undervoltage detection and shutdown. If a fault
occurs while using the STPIC44L02, the channel
transitates into a low duty cycle, pulse width
modulated (PWM) signal as long as the fault is
present.
These devices provide control of output channels
through a serial input interface or a parallel input
interface. A command to enable the output from
July 2003
4-CHANNEL SERIAL-IN PARALLEL-IN LOW
SIDE PRE-FET DRIVER
DEVICES ARE CASCADABLE
INTERNAL 55V INDUCTIVE LOAD CLAMP
AND VGS PROTECTION CLAMP FOR
EXTERNAL POWER FETS
INDEPENDENT SHORTED-LOAD AND
SHORT-TO-BATTERY FAULT DETECTION
ON ALL GATE TERMINALS
INDEPENDENT OFF-STATE OPEN-LOAD
FAULT SENSE
OVER-BATTERY-VOLTAGE LOCKOUT
PROTECTION AND FAULT REPORTING
UNDER-BATTERY VOLTAGE LOCKOUT
PROTECTION
ASYNCRONOUS OPEN-GATE FAULT FLAG
DEVICE OUTPUT CAN BE WIRED OR WITH
MULTIPLE DEVICES
FAULT STATUS RETURNED THROUGH
SERIAL OUTPUT TERMINAL
INTERNAL GLOBAL POWER-ON RESET OF
DEVICE AND EXTERNAL RESET TERMINAL
HIGH IMPEDANCE CMOS COMPATIBLE
INPUTS WITH HYSTERESIS
TRANSITION FROM THE GATE OUTPUT TO
A LOW DUTY CYCLE PWM MODE WHEN A
SHORTED LOAD FAULT OCCURS
4 CHANNEL SERIAL AND PARALLEL
LOW SIDE PRE-FET DRIVER
either interface enables the respective channels
gate output to the external FET. The serial
interface is recommended when the number of
signals between the control device and the
predriver are minimized and the speed of
operation is not critical. In applications where the
predriver
asynchronously, the parallel input interface is
recommended.
For serial operation, the control device must
transitate CS from high to low to activate the serial
input interface. When this occurs, SDO, is
enabled, fault data is latched into the serial
interface, and the fault flag is refreshed. Data is
clocked into the serial registers on low to high
transitions of SCLK through SDI. Each string of
data must consist of at least four bits of data. In
applications where multiple devices are cascaded
together, the string of data must consist of four bits
for each device. A high data bit turns the
respective output channel on and a low data bit
turns it off. Fault data for the device is clocked out
of SDO as serial input data is clocked into the
device. Fault data consists of fault flags for
shorted load and open load flags (bits 0-3) for
each of the four output channels. Fault register
bits are set or cleared asynchronously to reflect
the current state of the hardware. A fault must be
present when CS is transitated from high to low to
be captured and reported in the serial fault data.
New faults cannot be captured in the serial
register when CS is low. CS must be transitated
high after all of the serial data has been clocked
into the device. A low to high transition of CS
transfers the last four bits of serial data to the
must
respond
STPIC44L02
SOP
very
quickly
1/21
or

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STPIC44L02 Summary of contents

Page 1

... Each driver channel has independent off-state open-load detection and on-state shorted load short to battery detection. The STPIC44L02 offers a battery over voltage and undervoltage detection and shutdown fault occurs while using the STPIC44L02, the channel transitates into a low duty cycle, pulse width modulated (PWM) signal as long as the fault is present ...

Page 2

... STPIC44L02 output buffer that puts SDO in a high impedance state and clears and reenables the fault register. The STPIC44L02 was designed to allow the serial input interfaces of multiple devices to be cascated together to simplify the serial interface of the controller. Serial input data flows through the device and is transferred out SDO following the fault data in cascaded configurations ...

Page 3

... Figure 1 : Schematic Diagram STPIC44L02 3/21 ...

Page 4

... STPIC44L02 PIN DESCRIPTION PIN No SYMBOL 1 FLT 2 VCOMPEN 3 VCOMP 4 IN0 5 IN1 6 IN2 7 IN3 SDO 10 SDI 11 SCLK GND 14 DRAIN0 16 DRAIN1 19 DRAIN2 21 DRAIN3 15 GATE0 17 GATE1 18 GATE2 20 GATE3 22 RESET BAT 4/21 I/O NAME AND FUNCTION I Fault Flag. FLT is a logic level open-drain output that provides a real time fault flag for shorted-load, open-load, over-battery voltage, under-battery voltage faults ...

Page 5

... High Level Input Voltage IH V Low Level Input Voltage IL t Set-up Time, SDI High Before SCLK s t Hold Time, SDI High After SCLK h T Operating Case Temperature C Parameter Parameter STPIC44L02 Value Unit - ...

Page 6

... STPIC44L02 ELECTRICAL CHARACTERISTICS OVER RECOMMENDED OPERATING FREE-AIR TEMPERATURE RANGE (unless otherwise specified.) Symbol Parameter I Supply Current BAT I Supply Current CC V Over Battery Voltage (ovsd) Shutdown V Over Battery Voltage Reset hys(ov) Hysteresys V Under Battery Voltage ...

Page 7

... Over Battery Fault (see figure 10K to GND C = 200pF Fault (see figure 10K C = 50pF L L (see figure 10K C = 50pF L L (see figure 9) STPIC44L02 = 25°C, unless otherwise specified.) Min. Typ. Max 3 1.2 15 Unit ...

Page 8

... STPIC44L02 Figure 3 : Switching Time Figure 4 : Setup Time CS 8/21 to SCLK ...

Page 9

... Figure 5 : Propagation Delay Time Figure 6 : Propagation Delay Time Figure 7 : SDO Switching Time STPIC44L02 9/21 ...

Page 10

... STPIC44L02 Figure 8 : SDO Switching Time Figure 9 : FLT Switching Time PRINCIPLES OF OPERATION SERIAL DATA OPERATION The STPIC44L02 offers serial input interface to the microcontroller to transfer control data to the predriver and fault data back to the controller. The serial input interface consists of: SCLK - Serial Clock ...

Page 11

... Figure 10 : Serial Programming Example Figure 11 : 8-Bit Serial Programming Example (single device) STPIC44L02 11/21 ...

Page 12

... STPIC44L02 Figure 12 : 8-Bit Serial Programming Example (two predrivers cascated) Figure 13 : Fault Reading Example PARALLEL INPUT DATA OPERATION In addition to the serial interface the STPIC44L02 also provides a parallel microcontroller. The output turns on when either the parallel or the serial interface make it turn on. ...

Page 13

... The STPIC44L02 monitors the drain voltage of each channel to detect shorted load conditions. The onboard deglitch timer starts running when the gate output to the power FET transitates from the off state to the on state. The timer provides deglitch time, t (STBFM) voltage to stabilize after the power FET has been turned on (see figure 16 and 17) ...

Page 14

... The on-board deglitch timer starts running when the STPiC44L02, gate output to the power FET transitates to the off state. The timer provides a 60ms deglitch time, T the drain voltage to stabilize after the powerFET has been turned off. The deglitch time is only ...

Page 15

... FLAT that an open-load fault condition exists. The microcontroller can then read the serial port on the STPiC44L02 to isolate the channel that reported the fault condition. Fault bits 0-3 distinguish faults for each of the output Figure 17 : Open Load Short Circuit test Circuitry Figure 18 : Normal Condition Driving Load channels ...

Page 16

... FLT. The over-battery-voltage fault is not reported in the Figure 20 : Under Battery Shutdown UNDER-BATTERY-VOLTAGE SHUTDOWN The STPIC44L02 monitors the battery voltage to prevent the power FETs from being turned on in the event that the battery voltage is too low. When the ...

Page 17

... V . The internal reference is COMP selected by connecting V COMPEN V is selected by connecting V COMP (see Figure 23). Proper layout techniques should be used in the grounding network for the V circuit on the STPIC44L02. The ground for the STPIC44L02 to GND and to V COMPEN CC COMP 17/21 ...

Page 18

... STPIC44L02 predriver and V COMP connected to a Kelvin ground if available; otherwise, they should make single-point contact Figure 23 : External Reference Selection TYPICAL PERFORMANCE CHARACTERISTICS (unless otherwise specified T Figure 24 : Open Load Off State Detection Current 18/21 network should be back to the power ground of the FET array. ...

Page 19

... PIN 1 IDENTIFICATION SSOP24 MECHANICAL DATA mm. TYP MAX. 2 1.75 1.85 0.38 0.25 8.2 8.5 7.8 8.2 5.3 5.6 0.65 BSC 8˚ 0.75 0. STPIC44L02 inch MIN. TYP. MAX. 0.079 0.002 0.065 0.069 0.073 0.009 0.015 0.004 0.010 0.311 0.323 0.335 0.291 0.307 0.323 0.197 0.209 0.220 0.0256 BSC 0˚ 8˚ 0.022 0.030 ...

Page 20

... STPIC44L02 DIM. MIN 12 8.4 Bo 8.7 Ko 2.9 Po 3.9 P 11.9 20/21 Tape & Reel SSOP24 MECHANICAL DATA mm. TYP MAX. 330 13.2 22.4 8.6 8.9 3.1 4.1 12.1 inch MIN. TYP. MAX. 12.992 0.504 0.519 0.795 2.362 0.882 0.331 0.339 0.343 0.351 0.114 0.122 0.153 0.161 0.468 0.476 ...

Page 21

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