ACS8515REV2.1 Semtech Corporation, ACS8515REV2.1 Datasheet

ACS8515REV2.1

Manufacturer Part Number

ACS8515REV2.1

Description

Line Card Protection Switch for Sonet or SDH Network Elements

Manufacturer

Semtech Corporation

Datasheet

1.ACS8515REV2.1.pdf (50 pages)

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The ACS8515 is a highly integrated, single-chip

solution for ‘hit-less’ protection switching of SEC

clocks from Master and Slave SETS clockcards

in a SONET or SDH Network Element. The

ACS8515 has fast activity monitors on the in-

puts and will implement automatic system pro-

tection switching against master clock failure.

A further input is provided for an optional standby

SEC clock. The ACS8515 is fully compliant with

the required specifications and standards.

The ACS8515 can perform frequency translation

from a SEC input clock distributed along a back

plane to a different local line card clock, e.g.

8 kHz distributed on the back plane and

19.44 MHz generated on the line cards.

An SPI

providing access to the configuration and status

registers for device setup.

The ACS8515 can utilise either a low cost XO

oscillator module, or a TCXO with full tempera-

ture calibration - as required by the application.

Rev2.1 adds choice of edge alignment for 8kHz

input, as well as a low jitter n x E1/DS1 output

mode. Other minor changes are made, with all

described in Appendix A.

Revision 2.01/December 2005 Semtech Corp.

Figure 1. Simple Block Diagram

ADVANCED COMMUNICATIONS

Block Diagram

1.544/2.048MHz

Description

3 x SEC Input

Master/Slave

155.52MHz

+ Standby:

19.44MHz

38.88MHz

51.84MHz

77.76MHz

N x 8kHz

6.48MHz

MFrSync

(1)

compatible serial port is incorporated,

3xSEC

MFrSync

TCXO or XO

Chip Clock

Input

Ports

Generator

Monitors

Priority

Table

Set

Frequency Synthesis

DPLL

•Suitable for Stratum 3, 4E and 4 SONET

•Meets AT&T, ITU-T, ETSI and Telcordia

•Three SEC input clocks, from 2 kHz to

•Generates two SEC output clocks, up to

•Frequency translation of SEC input clock to a

•Robust input clock source frequency and

•Supports Free-run, Locked and Holdover

•Automatic ‘hit-less’ source switchover on loss

•External force fast switch between SEC inputs

•Phase build out for output clock phase

•SPI

•Programmable wander and jitter tracking

•Single +3.3 V operation. +5 V I/O compatible

•Operating temperature (ambient) -40°C to

•Available in 64 pin LQFP package

•Lead (pb)-free version available (ACS8515

(1) SPI is a trademark of Motorola Corporation

+85°C

Features

different local line card clock

activity monitoring on all inputs

of input

SPI Compatible Serial

for SONET or SDH Network Elements

or SDH Equipment Clock (SEC) applications

155.52 MHz

311.04 MHz

modes of operation

attenuation 0.1 Hz to 20 Hz

Rev2.1T) RoHS and WEEE compliant.

Microprocessor Port

specifications

continuity during input switchover

ACS8515 Rev2.1 LC/P

(1)

compatible serial microprocessor interface

L L L L L ine C C C C C ard P P P P P rotection S S S S S witch

Frequency

Dividers

APLL

MFrSync

2xSEC

Output

FrSync

Ports

www.semtech.com

FINAL

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