ACS8515REV2.1 Semtech Corporation, ACS8515REV2.1 Datasheet - Page 16

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ACS8515REV2.1

Manufacturer Part Number
ACS8515REV2.1
Description
Line Card Protection Switch for Sonet or SDH Network Elements
Manufacturer
Semtech Corporation
Datasheet

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Phase Build Out
Phase Build Out
2. ETSI 300 462-5, Section 9.2, requires that the long-
term phase error in the Holdover mode should not exceed
3. ANSI Tin1.101-1994, Section 8.2.2, requires that the
phase variation be limited so that no more than 255 slips
(of 125 µs each) occur during the first day of Holdover.
This requires a frequency accuracy better than:
Temperature variation is not restricted, except to within
the normal bounds of 0 to 50 Celsius.
4. Bellcore GR.1244.CORE, Section 5.2., Table 4, shows
that an initial frequency offset of 50 ppb is permitted on
entering Holdover, whilst a drift over temperature of 280
ppb is allowed; an allowance of 40 ppb is permitted for all
other effects.
5. ITU G.822, Section 2.6, requires that the slip rate during
category(b) operation (interpreted as being applicable to
Holdover mode operation) be limited to less than 30 slips
(of 125 µs each) per hour
Phase Build Out
Phase Build Out
Phase Build Out
Phase Build Out (PBO) is the function to minimise
phase transients on the output SEC clock during
input reference switching or mode switching. If
the currently selected input reference clock
source is lost (due to a short interruption, out
of frequency detection, or complete loss of
reference), the second, next highest priority
reference source will be selected. During this
transition, the Lost_Phase mode is entered.
The typical phase disturbance on clock
reference source switching will be less than
10 ns on the ACS8515. For clock reference
switching caused by the main input failing or
being disconnected, then the phase disturbance
Revision 2.01/December 2005 Semtech Corp.
where
a2 = 2000 ns/s (allowance for temperature variation)
b = 1.16x10
c = 120 ns (allowance for entry into Holdover mode).
ADVANCED COMMUNICATIONS
a1 = 50 ns/s (allowance for initial frequency offset)
((24x60x60)+(255x125µs))/(24x60x60) = 0.37 ppm
((((60 x 60)/30)+125µs)/(60x60)) = 1.042 ppm
-4
ns/s
{(a1+a2)S+0.5bS
2
(allowance for ageing)
2
+c}
16
on the output will still be less than the 120 ns
allowed for in the G.813 spec.
value is dependant on the frequency being
locked to.
The PBO requirement, as specified in Telcordia
GR1244-CORE, Section 5.7, in that a phase
transient of greater than 3.5 µs occuring in
less than 0.1 seconds should be absorbed, will
be implemented on a future version. ITU-T
G.813 states that the max allowable short term
phase transient response, resulting from a
switch from one clock source to another, with
Holdover mode entered in between, should be
a maximum of 1 µs over a 15 second interval.
The maximum phase transient or jump should
be less than 120 ns at a rate of change of less
than 7.5 ppm and the Holdover performance
should be better than 0.05 ppm.
On the ACS8515, PBO can be enabled, disabled
or frozen using the µP interface. By default, it
is enabled. When PBO is enabled, it can also
be frozen, which will disable the PBO operation
on the next input reference switch, but will
remain with the current offset.
disabled while the device is in the Locked mode,
there will be a phase jump on the output SEC
clocks as the DPLL locks back to 0 degree
phase error.
Microprocessor Interface
Microprocessor Interface
Microprocessor Interface
Microprocessor Interface
Microprocessor Interface
The
microprocessor interface that is compatible with
the Serial Peripheral Interface (SPI) for device
setup.
Register Set
Register Set
Register Set
Register Set
Register Set
All registers are 8-bits wide, organised with the
most-significant bit positioned in the left-most
bit, with bit-significance decreasing towards the
right-most bit. Some registers carry several
individual data fields of various sizes, from
single-bit values (e.g., flags) upwards. Several
data fields are spread across multiple registers;
their organisation is shown in the register map.
ACS8515 Rev2.1 LC/P
ACS8515
incorporates
www.semtech.com
The actual
a
If PBO is
FINAL
serial

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