ACS8515REV2.1 Semtech Corporation, ACS8515REV2.1 Datasheet - Page 33

• Manufacturer Part Number: ACS8515REV2.1
• Description: Line Card Protection Switch for Sonet or SDH Network Elements
• Manufacturer: Semtech Corporation

Lost-Phase Mode
Lost-Phase Mode
Holdover Mode
Holdover Mode
Lost-Phase Mode
Lost-Phase Mode
Lost-Phase Mode
Lost-phase mode is entered when the current
phase error, as measured within the DPLL, is
larger than a preset limit (see register 04, bits
5:3), as a result of a frequency or phase tran-
sient on the selected reference source. This
mode is similar in behavior to the Pre-locked or
Pre-locked(2) modes, although in this mode the
DPLL is attempting to regain lock to the same
reference rather than attempt lock to a new ref-
erence. If the DPLL cannot regain lock within 100
s, the source is disqualified, and one of the fol-
lowing transitions takes place:
1. Go to Pre-Locked(2);
2. Go to Holdover;
Holdover Mode
Holdover Mode
Holdover Mode
The Holdover mode is used when the circuit
was in Locked mode but the selected reference
source has become unavailable and a
replacement has not yet been selected.
Holdover freezes the DPLL at the current
frequency
sts_curr_inc_offset register). The proportional
DPLL path is ignored so that recent signal
disturbances do not affect the Holdover
frequency value.
Revision 2.01/December 2005 Semtech Corp.
ADVANCED COMMUNICATIONS
- If a known-good standby source is available.
- If no standby sources are available.
(as
reported
by
the
33
Pre-Locked(2) Mode
Pre-Locked(2) Mode
Pre-Locked(2) Mode
Pre-Locked(2) Mode
Pre-Locked(2) Mode
This state is very similar to the Pre-Locked state.
It is entered from the Holdover state when a
reference source has been selected and applied
to the phase locked loop. It is also entered if
the device is operating in Revertive mode and
a higher-priority reference source is restored.
Power On Reset - PORB
Power On Reset - PORB
Power On Reset - PORB
Power On Reset - PORB
Power On Reset - PORB
The Power On Reset (PORB) pin resets the
device if forced Low for a power-on-reset to be
initiated. The reset is asynchronous, the
minimum low pulse width is 5 ns. Reset is
needed to initialize all of the register values to
their defaults. Asserting Reset (POR) is required
at power on, and may be re-asserted at any
time to restore defaults. This is implemented
most simplistically by an external capacitor to
GND along with the internal pull-up resistor.
The ACS8515 is held in a reset state for 250
ms after the PORB pin has been pulled High. In
normal operation PORB should be held High.
ACS8515 Rev2.1 LC/P
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FINAL