ACS8510REV2.1 Semtech Corporation, ACS8510REV2.1 Datasheet - Page 37

• Manufacturer Part Number: ACS8510REV2.1
• Description: Synchronous Equipment Timing Source for Sonet or SDH Network Elements
• Manufacturer: Semtech Corporation

Forced Control Selection
Forced Control Selection
Automatic Control Selection
Automatic Control Selection
a locked state on the failed reference. This is
the case even if there are lower priority
references available or the currently selected
reference fails. When the ONLY valid reference
sources that are available have a lower priority
than the selected reference, a failure of the
selected reference will always trigger a switch-
over, regardless of whether Revertive or Non-
Revertive mode has been chosen.
Also, in a Master/Slave redundancy-protection
scheme, the Slave device(s) must follow the
Master device. The alignment of the Master
and Slave devices is part of the protection
mechanism. The availability of each source is
determined by a combination of local and
remote monitoring of each source. Each input
reference source supplied to each ACS8510
device is monitored locally and the results are
made available to other devices.
Forced Control Selection
Forced Control Selection
Forced Control Selection
A configuration register, cnfg_ref_selection,
controls both the choice of automatic or forced
selection and the selection itself (when forced
selection is required). The forced selection of
an input reference source occurs when the
cnfg_ref_selection variable contains a non-zero
value, the value then representing the input
port required to be selected. This is not the
normal
cnfg_ref_selection variable is defaulted to the
all-one value on reset, thereby adopting the
automatic selection of the reference source.
Automatic Control Selection
Automatic Control Selection
Automatic Control Selection
When an automatic selection is required, the
cnfg_ref_selection register must be set to all
zero or all one. The configuration registers,
cnfg_ref_selection_priority, held in the µP port
block, consists of seven, 8 bit registers
organised as one 4 bit register per input
reference port. Each register holds a 4-bit value
which represents the desired priority of that
particular port. Unused ports should be given
the value, '0000' or '1111', in the relevant
register to indicate they are not to be included
Revision 2.00/September 2003
ADVANCED COMMUNICATIONS
mode
of
operation,
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and
the
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in the priority table. On power-up, or following a
reset, the whole of the configuration file will be
defaulted to the values defined by Table 4. The
selection priority values are all relative to each
other, with lower-valued numbers taking higher
priorities. Each reference source should be given
a unique number, the valid values are 1 to 15
(dec). A value of 0 disables the reference
source. However if two or more inputs are given
the same priority number those inputs will be
selected on a first in, first out basis. If the first
of two same priority number sources goes
invalid the second will be switched in. If the
first then becomes valid again, it becomes the
second source on the first in, first out basis,
and there will not be a switch. If a third source
with the same priority number as the other two
becomes valid, it joins the priority list on the
same first in, first out basis. There is no implied
priority based on the channel numbers.
The input port <I_11> is for the connection of
the synchronous clock of the T
the Master device (or the active-Slave device),
to be used to align the T
Master (or active-Slave) device if this device is
acting in a subordinate-Slave or subordinate-
Master role.
Ultra Fast Switching
Ultra Fast Switching
Ultra Fast Switching
Ultra Fast Switching
Ultra Fast Switching
A reference source is normally disqualified after
the leaky bucket monitor thresholds have been
crossed. An option for a faster disqualification
has been implemented, whereby if register 48H,
bit 5 (Ultra Fast Switching), is set then a loss of
activity of just a few reference clock cycles will
set the ‘no activity alarm’ and cause a
reference switch. This can be chosen to cause
an interrupt to occur instead of or as well as
causing the reference switch. The sts_interrupts
register 05 Hex Bit 14 (main_ref_failed) of the
interrupt status register is used to flag inactivity
on the reference that the device is locked to
much faster than the activity monitors can
support. If bit 6 of the cnfg_monitors register
(flag ref loss on TDO) is set, then the state of
this bit is driven onto the TDO pin of the device.
ACS8510 Rev2.1 SETS
OUT0
output with the
OUT0
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output of
FINAL