ACS8510REV2.1 Semtech Corporation, ACS8510REV2.1 Datasheet - Page 43

• Manufacturer Part Number: ACS8510REV2.1
• Description: Synchronous Equipment Timing Source for Sonet or SDH Network Elements
• Manufacturer: Semtech Corporation

Protection Facility
Protection Facility
by GR-1244-CORE specification, if the selected
reference source is of good quality.
If the device cannot achieve lock within 100
seconds, it reverts to Holdover mode and
another reference source is selected.
Protection Facility
Protection Facility
Protection Facility
The ACS8510 supports redundancy protection.
The primary functions of this include:
- Alignment of the priority tables of both Master
and Slave ACS8510 devices so as to align the
selection of reference sources of both Master
and Slave ACS8510 devices.
- Alignment of the phases of the 8 kHz and
2 kHz clocks in both Master and Slave
ACS8510 devices to within one cycle of the
77.76 MHz internal clock.
When two ACS8510 devices are to be used in
a redundancy-protection scheme within an NE,
one will be designated as the Master and the
other as the Slave. It is expected that an NE
will use the T
operations because the T
to feed an SSU/BITS system. An SSU/BITS will
not be bothered by phase differences between
signals arriving from different sources because
it typically incorporates line build-out functions
to absorb phase differences on reference
inputs. This means that the phasing of the
composite clocks between two ACS8510
devices do not have to be mutually-aligned. The
same is not true, however, of the T
signals (T
clock). It is usually important to align the phases
of all equivalent T
different sources so that switch-over from one
device to another does not affect the internal
operations of the NE. Both ACS8510 devices
will produce the same signals, which will be
routed around the NE to the various consumers
(clock sinks). With the possible exception of a
Revision 2.00/September 2003
ADVANCED COMMUNICATIONS
01
- T
07
, Frame clock and Multi-Frame
OUT0
OUT0
output for its internal
signals generated by
Semtech Corp.
OUT4
output is intended
OUT0
output
43
through-timing mode, the signals from the
Master device will be used by all consumers,
unless the Master device fails, when each
consumer will switch over to the signals
generated by the Slave device.
Switchover to a new T
hitless as possible. This requires the signals of
both ACS8510 devices to be phase aligned at
each consumer. Phase alignment requires
frequency alignment. To ensure that both
devices can generate output clocks locked to
the same source, both devices are supplied
with the same reference sources on the same
input ports and will have identical priority tables.
Failures of selected reference sources will result
in both ACS8510 devices making the same
updates to their priority tables as availability
information will be updated in both devices.
Although, in principle, the priority tables will be
the same if the same reference sources are
used on the same input port on each device, in
practice, this is only true if the reference
sources actually arrive at each device - failures
of a source seen only by one device and not by
the other, such as could be caused, for example,
by a backplane connector failure, would result
in the priority tables becoming misaligned. It is
thus necessary to force the priority tables to
be aligned under normal operating conditions
so that the devices can make the same
decisions - this can be achieved by loading the
availability seen by one device (via the
sts_reference_sources register) into the
cnfg_sts_remote_sources_valid register of the
other device. Another factor which could affect
hit-less switching is the frequency of the local
oscillator clock used by each ACS8510 device:
these clocks are not mutually aligned and,
whilst this has no impact on the frequency of
the output clocks during locked mode, it could
cause the output frequencies to diverge during
Holdover mode if no action were taken to avoid
it. In order to maintain alignment of the output
frequencies of each ACS8510 device even
ACS8510 Rev2.1 SETS
OUT0
clock should be as
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FINAL