ACS8510REV2.1 Semtech Corporation, ACS8510REV2.1 Datasheet - Page 54

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ACS8510REV2.1

Manufacturer Part Number
ACS8510REV2.1
Description
Synchronous Equipment Timing Source for Sonet or SDH Network Elements
Manufacturer
Semtech Corporation
Datasheet

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Table 22. DC Characteristics: AMI Input/Output Port
Table 22. DC Characteristics: AMI Input/Output Port
Across all operating conditions, unless otherwise stated
The Alternate Mark Inversion (AMI) signal is DC balanced and consists of positive and negative
pulses with a peak to peak voltage of 2.0 +/- 0.2 V.
The electrical specifications are taken from option a) of Table 2/G.703 - Digital 64 kbit/s
centralized clock interface, from ITU G.703.
Table 22. DC Characteristics: AMI Input/Output Port
Table 22. DC Characteristics: AMI Input/Output Port
Table 22. DC Characteristics: AMI Input/Output Port
The electrical characteristics of 64 kbits/s interface are as follows;
Nominal bit rate: 64 kbit/s. The tolerance is determined by the network clock stability.
There should be a symmetrical pair carrying the composite timing signal (64 kHz and 8 kHz). The
use of transformers is recommended.
Over-voltage protection requirement; refer to Recommendation K.41.
Code conversion rules;
The data signals are coded in AMI code with 100% duty cycle. The composite clock timing signals
convey the 64 kHz bit-timing information using AMI coding with a 50% to 70% duty ratio and the
8 kHz octet phase information by introducing violations in the code rule. The structure of the
signals and voltage levels are shown in Figures 14 and 15.
Revision 2.00/September 2003
DC Characteristics: AMI Input/Output Port
DC Characteristics: AMI Input/Output Port
ADVANCED COMMUNICATIONS
DC Characteristics: AMI Input/Output Port
DC Characteristics: AMI Input/Output Port
DC Characteristics: AMI Input/Output Port
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ACS8510 Rev2.1 SETS
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