AT91FR40161 ATMEL Corporation, AT91FR40161 Datasheet - Page 50

• Manufacturer Part Number: AT91FR40161
• Description: The AT91FR40161 Features 136 K Bytes of On-chip SRAM, 2M Bytes of Flash, an External Bus Interface, a 3-channel Timer/Counter, 2 ...
• Manufacturer: ATMEL Corporation

PS: Power-saving
Peripheral Clocks
50
AT91X40 Series
The AT91X40 Series’ Power-saving feature enables optimization of power consumption.
The PS controls the CPU and Peripheral Clocks. One control register (PS_CR) enables
the user to stop the ARM7TDMI Clock and enter Idle Mode. One set of registers with a
set/clear mechanism enables and disables the peripheral clocks individually.
The ARM7TDMI clock is enabled after a reset and is automatically re-enabled by any
enabled interrupt in the Idle Mode.
The clock of each peripheral integrated in the AT91X40 Series can be individually
enabled and disabled by writing to the Peripheral Clock Enable (PS_PCER) and Periph-
eral Clock Disable Registers (PS_PCDR). The status of the peripheral clocks can be
read in the Peripheral Clock Status Register (PS_PCSR).
When a peripheral clock is disabled, the clock is immediately stopped. When the clock is
re-enabled, the peripheral resumes action where it left off.
To avoid data corruption or erroneous behavior of the system, the system software only
disables the clock after all programmed peripheral operations have finished.
The peripheral clocks are automatically enabled after a reset.
The bits that control the peripheral clocks are the same as those that control the Inter-
rupt Sources in the AIC.
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