LFECP40 Lattice Semiconductor, LFECP40 Datasheet - Page 66

• Manufacturer Part Number: LFECP40
• Description: (LFEC Series) LatticeECP/EC Family Data Sheet
• Manufacturer: Lattice Semiconductor

Lattice Semiconductor
Pin Information Summary
Single Ended User I/O
Differential Pair User I/O
Configuration
TAP
Dedicated (total without supplies)
V
V
V
GND, GND0-GND7
NC
Single Ended/
Differential I/O
per Bank
V
Note: During configuration the user-programmable I/Os are tri-stated with an internal pull-up resistor enabled. If any pin is not used (or not
bonded to a package pin), it is also tri-stated with an internal pull-up resistor enabled after configuration.
CC
CCAUX
CCIO
CCJ
Pin Type
Dedicated
Muxed
Bank0
Bank1
Bank2
Bank3
Bank4
Bank5
Bank6
Bank7
Bank0
Bank1
Bank2
Bank3
Bank4
Bank5
Bank6
Bank7
144-TQFP
110
97
72
13
48
14
14
13
13
14
13
14
5
4
2
2
2
1
2
2
2
2
1
0
8
8
1
208-PQFP
147
160
97
13
48
18
26
17
14
16
17
26
16
15
5
4
4
3
2
2
2
2
3
2
2
4
1
LFECP6/EC6
4-4
256-fpBGA
195
208
97
13
48
10
20
32
18
16
32
17
32
32
16
5
2
2
2
2
2
2
2
2
2
0
1
LatticeECP/EC Family Data Sheet
484-fpBGA
224
112
373
139
13
48
20
12
44
32
32
16
32
32
32
32
16
5
4
4
4
4
4
4
4
4
1
484-fpBGA
Pinout Information
360
180
373
13
56
20
12
44
48
48
40
44
48
48
44
40
LFECP20/EC20
5
4
4
4
4
4
4
4
4
3
1
672-fpBGA
400
200
509
13
56
32
20
63
96
64
48
40
48
48
64
48
40
5
6
6
6
6
6
6
6
6
1