HY29F800A Hynix Semiconductor, HY29F800A Datasheet

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HY29F800A

Manufacturer Part Number
HY29F800A
Description
Flash Memory
Manufacturer
Hynix Semiconductor
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HY29F800ATG-70
Manufacturer:
HYNIX/海力士
Quantity:
20 000
KEY FEATURES
n 5 Volt Read, Program, and Erase
n High Performance
n Low Power Consumption
n Compatible with JEDEC Standards
n Sector Erase Architecture
n Erase Suspend/Resume
GENERAL DESCRIPTION
The HY29F800A is an 8 Megabit, 5 volt only CMOS
Flash memory organized as 1,048,576 (1M) bytes
or 524,288 (512K) words. The device is offered in
industry-standard 44-pin PSOP and 48-pin TSOP
packages.
The HY29F800A can be programmed and erased
in-system with a single 5-volt V
generated and regulated voltages are provided for
program and erase operations, so that the device
does not require a high voltage power supply to
perform those functions. The device can also be
programmed in standard EPROM programmers.
Access times as fast as 55 ns over the full operat-
ing voltage range of 5.0 volts ± 10% are offered for
timing compatibility with the zero wait state require-
ments of high speed microprocessors. A 50 ns
Preliminary
Revision 1.1, February 2002
– Minimizes system-level power requirements
– Access times as fast as 50 ns
– 20 mA typical active read current in byte
– 35 mA typical program/erase current
– 5 µA maximum CMOS standby current
– Package, pinout and command-set
– Provides superior inadvertent write
– Boot sector architecture with top and
– One 16 Kbyte, two 8 Kbyte, one 32 Kbyte
– One 8 Kword, two 4 Kword, one 16 Kword
– A command can erase any combination of
– Supports full chip erase
– Temporarily suspends a sector erase
mode, 28 mA typical in word mode
compatible with the single-supply Flash
device standard
protection
bottom boot block options available
and fifteen 64 Kbyte sectors in byte mode
and fifteen 32 Kword sectors in word mode
sectors
operation to allow data to be read from, or
programmed into, any sector not being
erased
CC
supply. Internally
8 Megabit (1Mx8/512Kx16), 5 Volt-only, Flash Memory
n Sector Protection
n Temporary Sector Unprotect
n Internal Erase Algorithm
n Internal Programming Algorithm
n Fast Program and Erase Times
n Data# Polling and Toggle Status Bits
n Ready/Busy# Output (RY/BY#)
n Minimum 100,000 Program/Erase Cycles
n Space Efficient Packaging
LOGIC DIAGRAM
– Any combination of sectors may be locked
– Allows changes in locked sectors
– Automatically erases a sector, any
– Automatically programs and verifies data
– Byte programming time: 7 µs typical
– Sector erase time: 1.0 sec typical
– Chip erase time: 19 sec typical
– Provide software confirmation of
– Provides hardware confirmation of
– Available in industry-standard 44-pin
19
to prevent program or erase operations
within those sectors
(requires high voltage on RESET# pin)
combination of sectors, or the entire chip
at a specified address
completion of program or erase
operations
completion of program and erase
operations
PSOP and 48-pin TSOP and reverse
TSOP packages
A[18:0]
C E #
O E #
W E #
R E S E T #
B Y T E #
DQ[15]/A-1
DQ[14:8]
RY/BY#
DQ[7:0]
HY29F800A
8
7

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HY29F800A Summary of contents

Page 1

... Temporarily suspends a sector erase operation to allow data to be read from, or programmed into, any sector not being erased GENERAL DESCRIPTION The HY29F800A Megabit, 5 volt only CMOS Flash memory organized as 1,048,576 (1M) bytes or 524,288 (512K) words. The device is offered in industry-standard 44-pin PSOP and 48-pin TSOP packages. ...

Page 2

... HY29F800A version operating over 5.0 volts ± also avail- able. To eliminate bus contention, the HY29F800A has separate chip enable (CE#), write enable (WE#) and output enable (OE#) controls. The device is compatible with the JEDEC single power-supply Flash command set standard. Com- mands are written to the command register using ...

Page 3

... A0 24 Whenever a signal is separated into numbered bits, e.g., DQ[7], DQ[6], ..., DQ[0], the family of bits may also be shown collectively, e.g., as DQ[7:0]. The designation 0xNNNN ( indicates a number expressed in hexadeci- mal notation. The designation 0bXXXX indicates a number expressed in binary notation ( 1). HY29F800A ...

Page 4

... See the ‘Bus Operations’ and ‘Command Definitions’ sections of this docu- ment for additional information on these functions. In the HY29F800A, four of the sectors, which com- prise the boot block, vary in size from ...

Page 5

... Table 1. HY29F800A Memory Array Organization ...

Page 6

... Certain bus operations require a high voltage on one or more device pins. Those are described in Table 3. Read Operation Data is read from the HY29F800A by using stan- dard microprocessor read cycles while placing the address of the byte or word to be read on the device’s address inputs, A[18:0] in Word mode (BYTE A[18:-1] in Byte mode (BYTE ...

Page 7

... Standby Operation When the system is not reading from or writing to the HY29F800A, it can place the device in the Standby mode. In this mode, current consump- tion is greatly reduced, and the data bus outputs are placed in the high impedance state, indepen- dent of the OE# input ...

Page 8

... HY29F800A the duration of the RESET# pulse. The device also resets the internal state machine to reading array data operation was interrupted by the as- sertion of RESET#, it should be reinitiated once the device is ready to accept another command sequence to ensure data integrity. Current is reduced for the duration of the RESET# pulse as described in the Standby Operation sec- tion above ...

Page 9

... Read Data N O Data = 0x00 NSEC = 18 NSEC = NSEC + 1 SECTOR UNPROTECT Figure 2. Sector Unprotect Procedure is removed from RESET#, all the previ- ID Increment TRYCNT TRYCNT = 1000? Remove V from A9 ID DEVICE FAILURE HY29F800A ID 9 ...

Page 10

... A read cycle at address 0xXXX00 retrieves the manufacturer code (Hynix = 0xAD read cycle at address 0xXXX01 returns the device code: - HY29F800AT = 0xD6 in Byte mode, 0x22D6 - HY29F800AB = 0x58 in Byte mode, 0x2258 read cycle containing a sector address (Table 1) in A[18:12] and the address 0x02 in A[7:0] returns 0x01 if that sector is protected, or 0x00 unprotected ...

Page 11

... Table 5. HY29F800A Command Sequences ...

Page 12

... HY29F800A Sector Erase or Chip Erase command se- quence, the Read/Reset command may be written at any time before erasing actually be- gins, including, for the Sector Erase command, between the cycles that specify the sectors to be erased (see Sector Erase command de- scription). This aborts the command and re- sets the device to the Read mode ...

Page 13

... ERROR RECOVERY additional sector erase data cycles. Once the sec- tor erase operation itself has begun, only the Erase fying the additional sector in the sixth cycle. sequence, specifying the additional sector in the third cycle. HY29F800A 13 ...

Page 14

... cycles, and is ignored issued during chip erase or programming operations. The HY29F800A requires a maximum of 20 µs to suspend the erase operation if the Erase Suspend command is issued during active sector erasure. However, if the command is written during the time- out, the time-out is terminated and the erase op- eration is suspended immediately ...

Page 15

... Read mode or the Erase Suspend mode, but is invalid while the device is actively program- ming or erasing. WRITE OPERATION STATUS The HY29F800A provides a number of facilities to determine the status of a program or erase opera- tion. These are the RY/BY# (Ready/Busy#) pin and certain bits of a status word which can be read from the device during the programming and erase operations ...

Page 16

... HY29F800A Table 6. Write and Erase Operation Status Summary ...

Page 17

... After the initial Sector Erase command sequence is issued, the system should read the status on DQ[7] (Data# Polling) or DQ[6] (Toggle Bit I) to ensure that the device has accepted the command sequence, and then read DQ[3]. If DQ[ ‘1’, the internally controlled erase cycle has begun and HY29F800A PROGRAM/ERASE COMPLETE When the 17 ...

Page 18

... HY29F800A START Read DQ[7:0] at Valid Address (Note 1) Read DQ[7:0] at Valid Address (Note DQ[6] Toggled (Note (Note 3) PROGRAM/ERASE Notes: 1. During programming, the program address. During sector erase, an address within any sector scheduled for erasure. 2. Recheck DQ[6] since toggling may stop at the same time as DQ[5] changes from ...

Page 19

... HARDWARE DATA PROTECTION The HY29F800A provides several methods of pro- tection to prevent accidental erasure or program- ming which might otherwise be caused by spuri- ous system level signals during V power-down transitions, or from system noise. These methods are described in the sections that follow. Command Sequences Commands that may alter array data require a sequence of cycles as described in Table 5 ...

Page 20

... HY29F800A ABSOLUTE MAXIMUM RATINGS ...

Page 21

... HY29F800A ± µ µ A ± µ ...

Page 22

... HY29F800A DC CHARACTERISTICS CMOS Compatible ...

Page 23

... equivalen Measurement Level HY29F800A-50, -55 Version 2.0 V Measurement Levels 0.8 V HY29F800A-70, -90 Versions HY29F800A ...

Page 24

... HY29F800A AC CHARACTERISTICS Read Operations ...

Page 25

... Reset Timings During Automatic Algorithms Figure 14. RESET# Timings HY29F800A µ ...

Page 26

... HY29F800A AC CHARACTERISTICS Word/Byte Configuration (BYTE CE# ...

Page 27

... 5.0 volts, 100,000 cycles. In addition, CC HY29F800A µ s µ s µ ...

Page 28

... HY29F800A AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 0x555 Data 0xA0 RY/BY Notes Program Address Program Data Commands shown are for Word mode operation shown only to illustrate t ...

Page 29

... Data = 0x10 for chip erase 0x30 measurement references. It cannot occur as shown during a valid command sequence. HY29F800A Read Status Data (last two cycles Status ...

Page 30

... HY29F800A AC CHARACTERISTICS t Addresses DQ[7] DQ[6: RY/BY# Notes Valid Address for reading Data# Polling status data (see Write Operation Status section). 2. Illustration shows first status cycle after command sequence, last status read cycle and array data read cycle. ...

Page 31

... VIDR HY29F800A Erase Complete µ s µ µ µ s µ ...

Page 32

... HY29F800A AC CHARACTERISTICS Sector Protect Cycle A[18:12] A[0] A[ Data RESET Figure 23. Sector Protect Timings Protect Verify Cycle ...

Page 33

... Data RESET Rev. 1.1/Feb Figure 24. Sector Unprotect Timings HY29F800A Unprotect Verify Cycle 0x00 ...

Page 34

... HY29F800A AC CHARACTERISTICS Alternate CE# Controlled Erase/Program Operations ...

Page 35

... for Program 0x30 for Sector Erase 0x10 for Chip Erase measurement references. It cannot occur as shown during a valid command RH HY29F800A Status ...

Page 36

... HY29F800A Latchup Characteristics Notes: 1. Includes all pins except V . Test conditions TSOP and PSOP Pin Capacitance ...

Page 37

... PACKAGE DRAWINGS Physical Dimensions TSOP48 - 48-pin Thin Small Outline Package (measurements in millimeters) Pin 1.20 MAX 0.25MM (0.0098") BSC PSOP44 - 44-pin Plastic Small Outline Package (measurements in millimeters 1.27 NOM. 28.00 28.40 2.17 2.45 Rev. 1.1/Feb 02 48 11.90 12.10 25 18.30 18.50 19.80 20. 0.50 0.70 23 15.70 16.30 13.10 13.50 22 2.80 MAX. SEATING PLANE 0.10 0.35 0.35 0.50 0.95 1.05 0.50 BSC 0.05 0.15 0.08 0.20 0. 1.00 HY29F800A 0.10 0.21 37 ...

Page 38

... The complete part number is formed by appending the Boot Block Location code and the suffix shown in the table to the Device Number. For example, the part number for a 90 ns, Commercial temperature range device in the TSOP package with the top boot block option is HY29F800ATT-90. 38 ...

Page 39

... Hynix prior to use. Life support devices or systems are those which are intended for surgical implantation into the body, or which sustain life whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. HY29F800A 39 ...

Page 40

... HY29F800A Flash Memory Business Unit, Korea Hynix Semiconductor Inc. 891, Daechi-dong Kangnam-gu ...

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