MPC5554 Motorola, MPC5554 Datasheet - Page 5

• Manufacturer Part Number: MPC5554
• Description: Microcontroller
• Manufacturer: Motorola

Freescale Semiconductor
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Enhanced direct memory access (eDMA) controller
— 64 channels support independent 8-, 16-, 32-, or 64-bit single value or block transfers
— Supports variable sized queues and circular queues
— Source and destination address registers are independently configured to post-increment or
— Each transfer is initiated by a peripheral, CPU, or eDMA channel request
— Each eDMA channel can optionally send an interrupt request to the CPU on completion of a
Interrupt controller (INTC)
— 308 total interrupt vectors
— Unique 9-bit vector per interrupt source
— 16 priority levels with fixed hardware arbitration within priority levels for each interrupt
— Priority elevation for shared resources
Frequency modulated phase-locked loop (FMPLL)
— Input clock frequency from 8 MHz to 20 MHz
— Current controlled oscillator (ICO) range from 50 MHz to maximum device frequency
— Reduced frequency divider (RFD) for reduced frequency operation without re-lock
— 4 selectable modes of operation
— Programmable frequency modulation
— Lock detect circuitry continuously monitors lock status
— Loss of clock (LOC) detection for reference and feedback clocks
— Self-clocked mode (SCM) operation
— On-chip loop filter (reduces number of external components required)
— Engineering clock output
External bus interface (EBI)
— 1.8V
— Memory controller with support for various memory types
— 32-bit data bus and 24-bit address bus with transfer size indication
— Selectable drive strength
— Configurable bus speed modes
— Support for external master accesses to internal addresses
— Burst support
remain constant
single value or block transfer
– 278 peripheral interrupt requests
– plus 8 software setable sources
– plus 22 reserved interrupts
source
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3.3V I/O nominal I/O voltage
MPC5554 Microcontroller Product Brief, Rev. 2.1
Features
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