ADC-0803 Harris, ADC-0803 Datasheet

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ADC-0803

Manufacturer Part Number
ADC-0803
Description
(ADC0802 - ADC0804) 8-Bit/ Microprocessor- Compatible/ A/D Converters
Manufacturer
Harris
Datasheet
www.DataSheet4U.com
August 1997
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
Features
• 80C48 and 80C80/85 Bus Compatible - No Interfacing
• Conversion Time < 100 s
• Easy Interface to Most Microprocessors
• Will Operate in a “Stand Alone” Mode
• Differential Analog Voltage Inputs
• Works with Bandgap Voltage References
• TTL Compatible Inputs and Outputs
• On-Chip Clock Generator
• 0V to 5V Analog Voltage Input Range (Single + 5V Supply)
• No Zero-Adjust Required
Ordering Information
Pinout
CLK IN
V
V
ADC0802LCN
ADC0802LCD
ADC0802LD
ADC0803LCN
ADC0803LCD
ADC0803LCWM
ADC0803LD
ADC0804LCN
ADC0804LCD
ADC0804LCWM
AGND
DGND
V
PART NUMBER
REF
IN
INTR
Logic Required
IN
WR
CS
RD
ADC0802, ADC0803, ADC0804
(+)
(-)
/2
©
Harris Corporation 1997
10
1
2
3
4
5
6
7
8
9
Semiconductor
(PDIP, CERDIP)
TOP VIEW
ERROR
1
3
1
3
1 LSB
1 LSB
1 LSB
1 LSB
1 LSB
1 LSB
/
/
/
/
2
4
2
4
20
19
18
17
16
15
14
13
12
11
LSB
LSB
LSB
LSB
V+ OR V
CLK R
DB
DB
DB
DB
DB
DB
DB
DB
0 (LSB)
1
2
3
4
5
6
7 (MSB)
V
V
Reading
V
REF
REF
REF
REF
/2 = 2.500V
/2 Adjusted for Correct Full Scale
/2 = 2.500V
EXTERNAL CONDITIONS
Typical Application Schematic
PROCESSOR
ANY
DC
DC
(No Adjustments)
(No Adjustments)
ADC0802, ADC0803
6-5
Description
The ADC0802 family are CMOS 8-Bit, successive-approxi-
mation A/D converters which use a modified potentiometric
ladder and are designed to operate with the 8080A control
bus via three-state outputs. These converters appear to the
processor as memory locations or I/O ports, and hence no
interfacing logic is required.
The differential analog voltage input has good common-
mode-rejection and permits offsetting the analog zero-input-
voltage value. In addition, the voltage reference input can be
adjusted to allow encoding any smaller analog voltage span
to the full 8 bits of resolution.
TEMP. RANGE (
11
12
13
14
15
16
17
18
1
2
3
5
-55 to 125
-55 to 125
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
0 to 70
0 to 70
0 to 70
CS
RD
WR
INTR
DB
DB
DB
DB
DB
DB
DB
DB
7
6
5
4
3
2
1
0
Compatible, A/D Converters
CLK IN
V
CLK R
V
AGND
DGND
V
REF
IN
IN
o
C)
V+
(+)
(-)
/2
8-Bit, Microprocessor-
20
19
10
4
6
7
8
9
20 Ld PDIP
20 Ld CERDIP
20 Ld CERDIP
20 Ld PDIP
20 Ld CERDIP
20 Ld SOIC
20 Ld CERDIP
20 Ld PDIP
20 Ld CERDIP
20 Ld SOIC
ADC0804
10K
V
PACKAGE
+5V
REF
INPUTS
DIFF
/2
150pF
File Number
8-BIT RESOLUTION
OVER ANY
DESIRED
ANALOG INPUT
VOLTAGE RANGE
E20.3
F20.3
F20.3
E20.3
F20.3
M20.3
F20.3
E20.3
F20.3
M20.3
PKG. NO
3094.1

Related parts for ADC-0803

ADC-0803 Summary of contents

Page 1

... Copyright Harris Corporation 1997 ADC0802, ADC0803 Description The ADC0802 family are CMOS 8-Bit, successive-approxi- mation A/D converters which use a modified potentiometric ladder and are designed to operate with the 8080A control bus via three-state outputs. These converters appear to the processor as memory locations or I/O ports, and hence no interfacing logic is required ...

Page 2

... REF DAC AGND V 8 OUT (+) (-) IN ADC0802, ADC0803, ADC0804 “1” = RESET SHIFT REGISTER SET “0” = BUSY AND RESET STATE Q INPUT PROTECTION FOR ALL LOGIC INPUTS INPUT CLK A G1 RESET BV = 30V START F/F LADDER SUCCESSIVE AND APPROX. DECODER REGISTER ...

Page 3

... Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5V Voltage at Any Input . . . . . . . . . . . . . . . . . . . . . . -0. Operating Conditions Temperature Range ADC0802/03LD -55 ADC0802/03/04LCD . . . . . . . . . . . . . . . . . . . . . . . . -40 ADC0802/03/04LCN . . . . . . . . . . . . . . . . . . . . . . . . . .0 ADC0803/04LCWM . . . . . . . . . . . . . . . . . . . . . . . . -40 CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specifi ...

Page 4

... INHI Logic “0” Input Current (All Inputs), I INLO Supply Current (Includes Ladder Current), I+ DATA OUTPUTS AND INTR Logic “0” Output Voltage ADC0802, ADC0803, ADC0804 (Notes 1, 7) (Continued) TEST CONDITIONS MIN 125 C and f = 640kHz, Unless Otherwise Specified ...

Page 5

... None of these A/Ds requires a zero-adjust. However all zero code is desired for an analog input other than 0V narrow full scale span exists (for example: 0. full scale) the V Timing Waveforms FIGURE 1A FIGURE 1C. t ADC0802, ADC0803, ADC0804 (Notes 1, 7) (Continued) TEST CONDITIONS MIN l = -360 4.75V OUT V ...

Page 6

... V+ SUPPLY VOLTAGE (V) FIGURE 4. CLK IN SCHMITT TRIP LEVELS vs SUPPLY VOLTAGE 400 800 f CLK FIGURE 6. FULL SCALE ERROR vs f ADC0802, ADC0803, ADC0804 500 400 300 200 100 5.00 5.25 5.50 FIGURE 3. DELAY FROM FALLING EDGE OUTPUT 1000 T(-) 100 5.00 5 ...

Page 7

... T AMBIENT TEMPERATURE ( A FIGURE 8. OUTPUT CURRENT vs TEMPERATURE Timing Diagrams CS WR ACTUAL INTERNAL STATUS OF THE CONVERTER (LAST DATA READ) INTR (LAST DATA NOT READ) INTR CS RD DATA OUTPUTS ADC0802, ADC0803, ADC0804 (Continued) 1 1.5 1.4 I SOURCE 1 2.4V OUT 1.2 1.1 1 100 125 - FIGURE 9. POWER SUPPLY CURRENT vs TEMPERATURE ...

Page 8

... FIGURE 11B. ACCURACY = constant negative slope and the abrupt upside steps are always 1 LSB in magnitude, unless the device has missing codes. Detailed Description The functional diagram of the ADC0802 series of A/D /2 pin). The digital output REF converters operates on the successive approximation princi- ple (see Application Notes AN016 and AN020 for a more detailed description of this principle) ...

Page 9

... Rejection This A/D gains considerable applications flexibility from the ana- log differential voltage input. The V ADC0802, ADC0803, ADC0804 to automatically subtract a fixed voltage value from the input reading (tare correction). This is also useful in 4mA - 20mA cur- rent loop conversion. In addition, common-mode noise can be reduced by use of the differential input ...

Page 10

... ADC0802, ADC0803, ADC0804 For low-source-resistance V /2 REF V REF the 2 ADJ. /2 pin. This REF /2 input. The REF FIGURE 13. OFFSETTING THE ZERO OF THE ADC0802 AND / of the 3V span or 1.5V. The 2 signal from 0.5V to 3.5V with V IN FIGURE 14. HANDLING 10V ANALOG INPUT RANGE 6- REF R 9 ANALOG R ...

Page 11

... LSB value ( 2.500V). REF ADC0802, ADC0803, ADC0804 Full Scale Adjust REF The full scale adjustment can be made by applying a differential input voltage which is 1 desired analog full scale voltage range and then adjusting ...

Page 12

... ADC0802 - ADC0804 150pF N.O. 4 CLK IN START 5 INTR ANALOG INPUTS AGND V 9 REF 10 DGND FIGURE 17. FREE-RUNNING CONNECTION Driving the Data Bus This CMOS A/D, like MOS microprocessors and memories, will require a bus driver when the total capacitance of the data bus gets large ...

Page 13

... This can be tied directly to the CS pin of the A/D, provided that no other devices are addressed at HEX ADDR: 4XXX or 5XXX. In Figure 24 the ADC0802 series is interfaced to the MC6800 microprocessor through (the arbitrarily chosen) Port B of the MC6820 or MC6821 Peripheral Interface Adapter (PlA). Here ...

Page 14

... OUT 8131 BUS COMPARATOR FIGURE 21. ADC0802 TO 8080A CPU INTERFACE 6-18 INT (14) I/O WR (27) (NOTE) I/O RD (25) (NOTE (13) (NOTE (16) (NOTE (11) (NOTE (9) (NOTE (5) (NOTE (18) (NOTE (20) (NOTE) 6 ...

Page 15

... AGND V 9 150pF REF 10 DGND † Numbers in parentheses refer to MC6800 CPU Pinout. †† Numbers or letters in brackets refer to standard MC6800 System Common Bus Code. FIGURE 23. ADC0802 TO MC6800 CPU INTERFACE 10K ADC0802 - ADC0804 CLK R 19 LSB ...

Page 16

... Type: Al Å Å Thickness: 10k 1k Metallization Mask Layout V /2 REF DGND DB 7 (MSB ADC0802, ADC0803, ADC0804 PASSIVATION: Type: Nitride over Silox Nitride Thickness: 8k Silox Thickness: 7k ADC0802, ADC0803, ADC0804 AGND V (-) V (+) 6-20 Å Å INTR CLK ...

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