SDA9188-3X Infineon Technologies Corporation, SDA9188-3X Datasheet - Page 18
SDA9188-3X
Manufacturer Part Number
SDA9188-3X
Description
Picture-in-picture Processor With On-chip PLL
Manufacturer
Infineon Technologies Corporation
Datasheet
1.SDA9188-3X.pdf
(31 pages)
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Register 7 (Address 07
Bit
d4:d0
d5
d6
d7
Register 8 (Address 08
Bit
d3:d0
d4
d7:d5
Semiconductor Group
Function
Delay of the VSP pulse
0 = Vertical noise reduction OFF
1 = Vertical noise reduction ON
0 = Check for correct TV standard inactive
1 = Check for correct TV standard active
0 = PAL/NTSC
1 = SECAM
Function
0000 = min. brightness of the border frame
1111 = max. brightness of the border frame
0 = brightness of the border frame can be
selected by FRY
1 = brightness of the border frame can be
selected by FRY5:2
not used to be set to “0“.
H
H
)
)
18
Name
VSPDEL
VSPIS
STATP
AMSEC
Name
FRY5:2
FRYEN
Remarks
Setting is possible in steps
of 2,37 s (50 Hz or
1,185 s 100 Hz)
(see measuring circuit 6)
Noise reduction for the
vertical pulse of the parent
channel (should be set to
‘1’ under normal
conditions).
If the check for the correct
TV standard is active a full
frame display is only
possible if the number of
lines is exactly according
the TV standard:
312.5 (50 Hz)
262.5 (60 Hz)
Doubling of the gain if a
sufficient SECAM decoder
without delay line is used
Remarks
Setting only valid if the bit
d4 is set to ‘1’
SDA 9188-3X