CS98000-CQ Cirrus Logic, Inc., CS98000-CQ Datasheet - Page 15

• Manufacturer Part Number: CS98000-CQ
• Description: Internet DVD (iDVD) Chip Solution
• Manufacturer: Cirrus Logic, Inc.

4. MEMORY MAP
4.1
The CS98000 externally supports up to 32 Mbytes
DRAM and 16 Mbytes ROM/NVRAM. Table lists
the memory map as viewed by the RISC proces-
sors, and identifies whether each segment is
mapped or cacheable.
Memory Map - RISC Processor
DS525PP1
0000_0000 – 07FF_FFFF
8000_0000 - 81FF_FFFF
9400_0000 – 9CFF_FFFF
9C00_0000 – 9CFF_FFFF
9D00_0000 – 9DFF_FFFF
A000_0000 – A1FF_FFFF
B000_0000 – B003_FFFF
B400_0000 – BCFF_FFFF
BC00_0000 – BCFF_FFFF
BD00_0000 – BDFF_FFFF
C000_0000 – FFFF_FFFF
0000 0000 – 003F FFFF
1000 0000 – 13FF FFFF
1400 0000 – 17FF FFFF
0_0000 – 0_2FFF
0_3000 – 1_FFFF
2_0000 – 2_FFFF
3_0000 – 3_FFFF
Processor Memory Map
Processor byte address
Host byte address
Byte address offset
Table 1. Host Port Memory Map
Table 2. Internal IO space map
DRAM (mapped)
DRAM (32 Mbytes)
16 bit NVRAM write (16 Mbytes)
16 bit NVRAM/ROM (16 Mbytes)
8 bit NVRAM/ROM (16 Mbytes)
DRAM (32 Mbytes)
16 bit NVRAM write (16 Mbytes)
16 bit NVRAM/ROM (16 Mbytes)
8 bit NVRAM/ROM (16 Mbytes)
DRAM (mapped)
Internal I/O (256 Kbytes)
Internal I/O Space
DRAM space (16 Mbytes)
NVRAM space (16 Mbytes)
RISC_0 Internal SRAM/Registers
RISC_1 Internal SRAM/Registers
General registers
General Internal SRAM
4.2
Table 1 lists the memory map as viewed by host
slave port.
4.3
Table 2 shows how the Internal IO space is mapped
between general registers, internal SRAM ports,
and the RISC processors’ debug port.
Description
Host Port Memory Map
Internal IO Space Map
Description
Description
Cacheable
CS98000
Y
N
Y
Y
N
N
N
N
Y
N
Y
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