ACS-1024-LG Photon Vision Systems, Inc., ACS-1024-LG Datasheet - Page 12

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ACS-1024-LG

Manufacturer Part Number
ACS-1024-LG
Description
Image Sensor, CMOS|CCD, 1026x1026 Pixels, 132pin LCC
Manufacturer
Photon Vision Systems, Inc.
Datasheet
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G14
D15
D14
D13
A14
A13
A12
A11
A10
F15
F14
F13
E15
E14
C15
E13
C14
B15
C12
B13
B12
C11
B11
C10
B10
Product DATASHEET ACS PDS0003 Subject to change without notice. Page 12 of 26
B9
C9
A9
B8
A8
COL_LOAD
ROW_LOAD
GB_ANA_GND
ANA_GND2
ANA_GND1
ANA_PAD_GND
GB_ANA_PWR
ANA_PAD_PWR
PIX_AMP_ANA_P
WR
ANA_PWR1
ANA_PWR2
ANALOG_OUT
BIAS_PAD_EXT
ANALOG_IN
DIG_PAD_PWR
DIG_PWR
DIG_GB_PWR
DIG_PAD_GND
DIG_GND
ADD0
ADD1
ADD2
ADD3
ADD4
CLK_IN_2X
CLK1X
__________
N_ACTIVE
_________
N_FRAME
DIG_PAD_PWR
DIG_PAD_GND
Photon Vision Systems, Inc.
Digital Input
SLAVE only
Digital Input
SLAVE only
Guard Band analog
Analog Circuits 2
Ground
Analog Circuits 1
Ground
Analog Pad
Ground
Guard Band analog
POWER 5.0 VDC
Analog Pad POWER
5.0 VDC
Analog Power
5.0 Volts
Analog Circuits 1
POWER 5.0 VDC
Analog Circuits 2
POWER 5.0 VDC
Analog Video Out
Analog pixel Bias
Analog input,
Range 0.9-3.2 VDC
Digital Pad Power
5.0 VDC
Digital Circuits Power
5.0 VDC
Digital Guard Band
Power 5.0 VDC
Digital Pad Ground
Digital Ground
Digital Input
Setup Register Address
Bit 0 - LSB.
Digital Input
Setup Register Address
Bit 1.
Digital Input
Setup Register Address
Bit 2.
Digital Input
Setup Register Address
Bit 3.
Digital Input
Setup Register Address
Bit 4 - MSB.
Digital Input
Master Clock
Digital Output
Digital Output
Row video Valid
Digital Output
Frame Valid
Digital Video output
pad power
Digital Video output
pad ground
Copyright© 2002 Rev A
Load Column Address that is loaded onto C_DATA bus (pins 10-
21) into imager. Only Works in SLAVE mode.
Pin must be connected whenever in SLAVE mode, do not float.
Load Row Address that is loaded onto the R_DATA bus (pins 22-
33) into imager. Only works in SLAVE mode.
Pin must be connected whenever in SLAVE mode, do not float.
Ground for Analog guard band
Ground input for the A/D
Ground input for the A/D.
Ground input for analog pads.
Power in for Analog Guard Band.
Power in for analog pads.
Power to Column amplifier
Power in for the A/D.
Power in for the A/D.
Video output – analog, requires 1.0k ohm pull-up to VDD
Tie a 10-30pF capacitor from this pin to analog ground.
Referenced to pin 63. Use this pin to input an external analog
signal for referencing the A/D and/or calibration. Note that the
last pixel of each frame read is the converted value of this
reference, not the value of the pixel, when Control Reg. 1 bit 6 is
set high.
Power in for Digital Pads
Power in for Digital circuits
Power in for Digital Guard Band.
Power in for Digital Pads
Ground input for Digital circuits.
Setup register address bit 0 - LSB. Address bus for access to the
SETUP REGISTERS.
Setup register address bit 1. Address bus for access to the SETUP
REGISTERS.
Setup register address bit 2. Address bus for access to the SETUP
REGISTERS.
Setup register address bit 3. Address bus for access to the SETUP
REGISTERS.
Setup register address bit 4. Address bus for access to the SETUP
REGISTERS.
Input for Master Clock, must be 2X desired pixel read rate.
Output Pixel Clock Rate. Note that this pin is referenced to pin 90.
Output goes TRUE LOW when an active line of video is output.
Output goes TRUE LOW when an active frame of video is output.
This value may be between 5.0v and 3.3v, the result is that all the
digital video output pads will have the selected vdd at the true high
level
Ground digital video output pads.

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