ACS-1024-LG Photon Vision Systems, Inc., ACS-1024-LG Datasheet - Page 8

• Manufacturer Part Number: ACS-1024-LG
• Description: Image Sensor, CMOS|CCD, 1026x1026 Pixels, 132pin LCC
• Manufacturer: Photon Vision Systems, Inc.

MODE 2
Mode 2 is transfer and accumulate, or Adaptive Exposure Control (AEC). The objective of this mode is to allow the user to
sample the video amplitude in the pixels while integration is occurring. This is useful under lighting conditions that vary from
sample to sample. When the user has determined that a sufficient signal level exists, the user will typically change to mode 3
and acquire a frame of useful data.
The differential amplifier requires a “background sample” to operate correctly. However in mode 2 the PD and SS must be
electrically connected to sample the video amplitude. When the ACS is switched to mode 2, it stores the background sample
from the previous frame for this purpose. While in mode 2 no CDS is actually taking place, to subtract the background during
final readout. When a sufficient sample is obtained, it is recommended that the user switch to mode 1 for readout.
MODE 3
Mode 3 is Full Frame Shutter and Destructive Readout. This mode typically would be used in conjunction with the
HOLDOFF and TRANSFER registers. At the start of a frame the Controller tests the HOLDOFF register for a non-zero
value. If present the Controller waits an amount of time determined by this value, during which the pixels are held in reset. At
the end of the holdoff time the pixels are placed into integration. Next the Controller tests the TRANSFER register and waits
for that period of time, ending by transferring the PD vale to the SS. The Controller then begins readout. Note that if the
HOLDOFF register is zero, no pixel reset will take place. If the TRANSFER register is zero, there will be no integration time.
Signal Description
Signal
No.
10
11
12
13
1
2
3
4
5
6
7
8
9
LCC
Pin
117
118
119
120
121
122
123
124
125
126
127
128
129
CPGA
Pin
D3
C2
B1
D2
E3
C1
E2
D1
G2
G3
F3
F2
E1
Product DATASHEET ACS PDS0003 Subject to change without notice. Page 8 of 26
REG_DATA_5
REG_DATA_6
REG_DATA_7
REG_DATA_8
REG_DATA_9
REG_DATA_10
REG_DATA_11
DIG_PAD_PWR
DIG_PAD_GND
C_DATA_0
M/S
C_DATA_1
M/S
C_DATA_2
M/S
C_DATA_3
M/S
Name
Photon Vision Systems, Inc.
Bi-directional I/O
See pins 56,57
Bi-directional I/O
See pins 56,57
Bi-directional I/O
See pins 56,57
Bi-directional I/O
See pins 56,57
Bi-directional I/O
See pins 56,57
Bi-directional I/O
See pins 56,57
Bi-directional I/O
See pins 56,57
Digital Pad Power
5.0 VDC
Digital Pad Power
Ground
Bi-directional I/O
Digital In - SLAVE
Digital Out - MAST
Bi-directional I/O
Digital In - SLAVE
Digital Out - MAST
Bi-directional I/O
Digital In - SLAVE
Digital Out - MAST
Bi-directional I/O
Digital In - SLAVE
Copyright© 2002 Rev A
Signal Type
Setup Register data bit 5.
See Register setup table for more information
Pin must be connected whenever in SLAVE mode, do not float.
Setup Register data bit 6.
See Register setup table for more information
Pin must be connected whenever in SLAVE mode, do not float.
Setup Register data bit 7.
See Register setup table for more information
Pin must be connected whenever in SLAVE mode, do not float.
Setup Register data bit 8.
See Register setup table for more information
Pin must be connected whenever in SLAVE mode, do not float.
Setup Register data bit 9.
See Register setup table for more information
Pin must be connected whenever in SLAVE mode, do not float.
Setup Register data bit 10.
See Register setup table for more information
Pin must be connected whenever in SLAVE mode, do not float.
Setup Register data bit 11, MSB.
See Register setup table for more information
Pin must be connected whenever in SLAVE mode, do not float.
Power in for Digital Pads
Power ground for Digital Pads
Column address LSB BIT 0 - If in SLAVE mode, input column
address for random access. If in MASTER mode, output for
currently addressed pixel. Pin must be connected whenever in
SLAVE mode, do not float.
Column address BIT 1 - If in SLAVE mode, input column address
for random access. If in MASTER mode, output for currently
addressed pixel. Pin must be connected whenever in SLAVE
mode, do not float.
Column address BIT 2 - If in SLAVE mode, input column Pin
must be connected whenever in SLAVE mode, do not float.
Address for random access. If in MASTER mode, output for
currently addressed pixel.
Column address BIT 3 - If in SLAVE mode, input column Pin
must be connected whenever in SLAVE mode, do not float.
Address for random access If in MASTER mode output for
Description