TDA9105 ST Microelectronics, TDA9105 Datasheet - Page 17

• Manufacturer Part Number: TDA9105
• Description: DEFLECTION PROCESSOR FOR MULTISYNC MONITORS
• Manufacturer: ST Microelectronics

OPERATING DESCRIPTION (continued)
PLL2
Figure 13 : PLL2 Timing Diagram
Figure 15 : Dual PLL Block Diagram
The duty cycle of H-drive is adjustable between 30% and 50%.
Horizontal
Input
Flyback
Internally
Shaped Flyback
H Drive
H Osc
Sawtooth
17
Duty Cycle
Ts
VA
0.75T
INTERFACE
INPUT
VB
Rapcyc
Adjust
RAP
CYC
PWM
4
C Lockdet
0.25T
PHi2
Cap
13
LOCKDET
3
COMP1
E2
HLOCKOUT
6.4V
4V
1.6V
CHARGE
PUMP
2
High
Low
High
Low
LOGI
PWM
CHARGE
PUMP
COMP2
4V
The PLL2 ensures a constant position of the
shaped flyback signal in comparison with the saw-
tooth of the VCO (see Figure 13).
The phase comparator of PLL2 is followed by a
charge pump with a
The flyback input is composed of an NPNtransistor.
This input has to be current driven.
The maximum recommanded input current is 2mA
(see Figures 14 and 15).
Figure 14 : Flyback Input Electrical Diagram
EN
PLL1INHIB
Horizontal
INHIBITION
ADJUST
PHASE
Adjust
15
PLL
14
HFLY
Filter
12
3.2V
R0 C0
11 10
5
VCO
OSC
0.5mA (typ.) output current.
20k
GND 0V
400
FLYBACK
BUFFER
Q1
21
20
5
Flyback
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