TDA9105 ST Microelectronics, TDA9105 Datasheet - Page 19

• Manufacturer Part Number: TDA9105
• Description: DEFLECTION PROCESSOR FOR MULTISYNC MONITORS
• Manufacturer: ST Microelectronics

OPERATING DESCRIPTION (continued)
Moire Function
Figure 18 : Moire Function Block Diagram
Figure 19 : Moire Output Waveform
Geometric Corrections
The principle is represented in Figure 20.
Starting from the vertical ramp, a parabola shaped
is generatedfor E/Wcorrection, dynamic horizontal
phase control correction, and vertical dynamic Fo-
cus correction.
The core of the parabola generator is an analog
multiplier. The output current of which is equal to :
Where V
prised between 2 and 5V, V
input adjustable in the range 3.2V
to generate a dissymmetric parabola if required
(keystone adjustment).
In order to keep good screen geometry for any end
user preferences adjustment we implemented the
RAMP
EVEN FRAME
H
V
MOIRE
ODD FRAME
H
V
MOIRE
I = k (V
is the vertical ramp, typically com-
V-SYNC
RAMP
- V
DCIN
DCIN)
H-S YNC
is a vertical DC
2
Monosta ble
.
3.8V in order
Ck
D
Ck
D
Rs t
Q
Q
Q
Q
possibility to have ”geometry tracking”. To enable
the ”tracking” function, the V
nected to V
It is possible to inhibit V
fixed DC voltage on the V
This DC voltage in that case must be taken from
the vertical reference and adjusted to 3.5V with an
external bridge resistor.
Due to large output stages voltage range (E/W,
BALANCE, FOCUS), the combination of tracking
function with maximum vertical amplitude max. or
min. vertical position and maximum gain on the DC
control inputs may leads to the output stages satu-
ration. This must be avoided by limiting the output
voltage by apropriate DC control voltages.
DCIN
.
POS
DCIN
tracking by applying a
DCOUT
23
Pin.
must be con-
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