DS2480 Dallas Semiconducotr, DS2480 Datasheet - Page 8

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DS2480

Manufacturer Part Number
DS2480
Description
Serial 1.Wire Line Driver
Manufacturer
Dallas Semiconducotr
Datasheet

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Searching the 1–Wire bus to identify all ROM IDs of the
devices connected, however, requires reading two bits,
making a decision and then writing a bit. This procedure
is to be repeated 64 times to identify and address a
single device. With the overhead of modern operating
systems this fairly simple process takes a lot of time,
reducing the discovery rate of devices on the 1–Wire
bus from a typical value of 40 to 50 per second under
DOS to less than 10 under Windows. To solve this prob-
lem the Search Accelerator was developed.
The Search Accelerator receives from the host informa-
tion on the preferred path to chose during the execution
of the Search ROM function as one contiguous chain of
bytes and then translates it into the appropriate time
slots on the 1–Wire bus. In addition, the Search Acceler-
ator reports back to the host the ROM ID of the device
actually addressed and the bit positions in which con-
flicts were found. (If the ROM ID of one device has a 0 in
a bit position where another device has a 1, this is called
a “conflict” on the electrical level and “discrepancy” on
the logical level. See the Book of DS19xx iButton Stan-
dards for a more detailed discussion of the Search
ROM). This helps the host to select the preferred path
for the next Search ROM activity.
Since the ROM ID of all MicroLAN compatible devices is
64 bits long and a conflict may occur in any of these bits,
the total length of data reported to the host is 128 bits or
16 bytes. To avoid data overrun (if the CPU sends data
faster than it can be processed) the protocol for the
Search Accelerator operation was defined so that one
has to send as many bytes as one will receive. This way
the CPU sends 16 bytes for each path and the UART
guarantees the correct data timing and frees the CPU
for other tasks while the DS2480 performs a Search
ROM function.
SEARCH ACCELERATOR OPERATION
After the Search Accelerator is activated and the data
mode is selected, the host must send 16 bytes to com-
plete a single Search ROM pass on the 1–Wire bus.
These bytes are constructed as follows:
first byte
et cetera
DS2480
042498 8/26
r
7
3
x
6
3
r
5
2
x
4
2
r
3
1
x
2
1
r
1
0
x
0
0
16th byte
In this scheme, the index (values from 0 to 63, “n”) des-
ignates the position of the bit in the ROM ID of a Micro-
LAN compatible device. The character “x” marks bits
that act as filler and do not require a specific value (don’t
care bits). The character “r” marks the path to go at that
particular bit in case of a conflict during the execution of
the ROM Search.
For each bit position n (values from 0 to 63) the DS2480
will generate three time slots on the 1–Wire bus. These
are referenced as:
b0
b1
b2
The type of time slot b2 (write 1 or write 0) is determined
by the DS2480 as follows:
b2
The response the host will receive during a complete
pass through a Search ROM function using the Search
Accelerator consists of 16 bytes as follows:
first byte
et cetera
16th byte
As before, the index (values from 0 to 63, “n”) desig-
nates the position of the bit in the ROM ID of a MicroLAN
compatible device. The character “d” marks the discrep-
ancy flag in that particular bit position. The discrepancy
flag will be 1 if there is a conflict or no response in that
particular bit position and 0 otherwise. The character
“r’ ” marks the actually chosen path at that particular bit
position. The chosen path is identical to b2 for the partic-
ular bit position of the ROM ID.
r’
r
r’
7
63
7
7
63
3
for the first time slot (read data)
for the second time slot (read data) and
for the third time slot (write data).
= r
= b
= 1 if error (there is no response)
d
x
d
6
n
6
6
63
63
0
3
if conflict (as chosen by the host)
if no conflict (there is no alternative)
r’
r
r’
5
62
5
5
62
2
d
x
d
4
4
4
62
62
2
r’
r
r’
3
61
3
3
61
1
d
x
d
2
61
2
2
61
1
r’
r
r’
60
1
1
1
60
0
x
d
d
0
60
0
0
60
0

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