DS2482-100 Dallas Semiconducotr, DS2482-100 Datasheet - Page 12

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DS2482-100

Manufacturer Part Number
DS2482-100
Description
Single-Channel 1-Wire Master
Manufacturer
Dallas Semiconducotr
Datasheet

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Manufacturer
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Part Number:
DS2482-100
Manufacturer:
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Part Number:
DS2482-100
Manufacturer:
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Quantity:
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Figure 6. Write-0 Time Slot
Figure 7. Write-1 and Read-Data Time Slot
NOTE on Figure 7: Depending on its internal state, a 1-Wire slave device transmits data to its master (e.g., the
DS2482). When responding with a 0, a 1-Wire slave starts pulling the line low during t
generator determines when this pulldown ends and the voltage starts rising again. When responding with a 1, a
1-Wire slave does not hold the line low at all, and the voltage starts rising as soon as t
data sheets use the term t
identical specifications and cannot be distinguished from each other.
1-Wire Write Byte
Command Code
Command Parameter
Description
Typical Use
Restriction
Error Response
Command Duration
1-Wire Activity
Read Pointer Position
Status Bits Affected
Configuration Bits Affected
V
V
V
V
V
V
0V
0V
IH1
IH1
IL1
IL1
cc
cc
t
t
F1
F1
Pull-up (see Fig. 2)
Pull-up (see Fig. 2)
RL
t
W1L
instead of t
A5h
Data Byte
Writes single data byte to the 1-Wire line.
To write commands or data to the 1-Wire line; equivalent to executing
eight 1-Wire Single Bit commands, but faster due to less I²C traffic.
1-Wire activity must have ended before the DS2482 can process this
command.
Command code and data byte are not acknowledged if 1WB = 1 at the
time the command code is received and the command will be ignored.
8 × t
bit) of the data byte.
Begins maximum 262.5ns after falling SCL edge of the LS bit of the data
byte (i.e., before the data byte acknowledge).
NOTE: The bit order on the I²C bus and the 1-Wire line is different.
(1-Wire: LS-bit first; I²C: MS-bit first) Therefore, 1-Wire activity cannot
begin before the DS2482 has received the full data byte.
Status register (for busy polling)
1WB (set to 1 for 8 × t
1WS, SPU, APU apply
t
t
SLOT
MSR
MSR
W1L
+ maximum 262.5ns, counted from falling edge of the last bit (LS
to describe a Read-Data Time Slot. Technically, t
12 of 21
t
W0L
DS2482 pull-down
DS2482 pull-down
t
SLOT
SLOT
t
SLOT
)
t
REC0
1-W Slave pull-down
W1L
W1L
is over. 1-Wire device
; its internal timing
RL
and t
W1L
have

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