XC3S250E Xilinx, Inc., XC3S250E Datasheet - Page 57

• Manufacturer Part Number: XC3S250E
• Description: Spartan-3E FPGA Family
• Manufacturer: Xilinx, Inc.

Functional Description
Table 35: Direct Connections from Clock Inputs to DCMs and Associated DCM Location String
Table 36: Connections from Clock Inputs to BUFGMUX Elements and Associated Quadrant Clock
50
Notes:
1.
2.
Quadrant
Line
Clock
See
See
within a quadrant.
A
B
C
D
G
H
E
F
(1)
Quadrant Clock Routing
Figure 42
GCLK[15:12]
RHCLK[3:0]
RHCLK[7:4]
GCLK[11:8]
LHCLK[3:0]
LHCLK[7:4]
Clock Input
GCLK[3:0]
GCLK[7:4]
Location
X0Y2
X0Y3
X0Y4
X0Y5
X0Y6
X0Y7
X0Y8
X0Y9
for specific BUFGMUX locations and
Left-Half BUFGMUX
(2)
LHCLK7
LHCLK6
LHCLK5
LHCLK4
LHCLK3
LHCLK2
LHCLK1
LHCLK0
I0 Input
for connectivity details for the eight quadrant clocks.
LHCLK6
LHCLK7
LHCLK4
LHCLK5
LHCLK2
LHCLK3
LHCLK0
LHCLK1
I1 Input
DCM_X0Y0
DCM_X0Y1
XC3S100E
N/A
N/A
N/A
N/A
N/A
N/A
Figure 44
Location
X2Y11
X2Y10
X1Y11
X1Y10
X2Y1
X2Y0
X1Y1
X1Y0
www.xilinx.com
Top or Bottom BUFGMUX
for information on how BUFGMUX elements drive onto a specific clock line
(2)
GCLK0 or
GCLK1 or
GCLK2 or
GCLK3 or
GCLK4 or
GCLK5 or
GCLK6 or
GCLK7 or
GCLK12
GCLK13
GCLK14
GCLK15
GCLK10
GCLK11
XC3S250E/XC3S500E
I0 Input
GCLK8
GCLK9
DCM_X1Y0
DCM_X1Y1
DCM_X0Y1
DCM_X0Y0
N/A
N/A
N/A
N/A
GCLK1 or
GCLK0 or
GCLK3 or
GCLK2 or
GCLK5 or
GCLK4 or
GCLK7 or
GCLK6 or
GCLK13
GCLK12
GCLK15
GCLK14
GCLK11
GCLK10
I1 Input
GCLK9
GCLK8
Location
X3Y2
X3Y3
X3Y4
X3Y5
X3Y6
X3Y7
X3Y8
X3Y9
Advance Product Specification
Right-Half BUFGMUX
XC3S1200E/XC3S1600E
DS312-2 (v1.1) March 21, 2005
(2)
DCM_X2Y0
DCM_X3Y1
DCM_X3Y2
DCM_X2Y2
DCM_X1Y3
DCM_X0Y2
DCM_X0Y1
DCM_X1Y0
RHCLK0
RHCLK1
RHCLK2
RHCLK3
RHCLK4
RHCLK5
RHCLK6
RHCLK7
I0 Input
RHCLK1
RHCLK0
RHCLK3
RHCLK2
RHCLK5
RHCLK4
RHCLK7
RHCLK6
I1 Input
R