LM3S6422 Luminary Micro, Inc, LM3S6422 Datasheet - Page 302

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LM3S6422

Manufacturer Part Number
LM3S6422
Description
Lm3s6422 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Reset
Reset
Type
Type
Universal Asynchronous Receivers/Transmitters (UARTs)
UART Interrupt Clear (UARTICR)
UART0 base: 0x4000.C000
Offset 0x044
Type W1C, reset 0x0000.0000
302
Bit/Field
31:11
10
9
8
7
RO
RO
31
15
0
0
Register 13: UART Interrupt Clear (UARTICR), offset 0x044
The UARTICR register is the interrupt clear register. On a write of 1, the corresponding interrupt
(both raw interrupt and masked interrupt, if enabled) is cleared. A write of 0 has no effect.
RO
RO
30
14
0
0
reserved
reserved
RO
RO
29
13
0
0
Name
OEIC
BEIC
PEIC
FEIC
RO
RO
28
12
0
0
RO
RO
27
11
0
0
W1C
W1C
W1C
W1C
Type
RO
OEIC
W1C
RO
26
10
0
0
Reset
0x00
BEIC
W1C
RO
25
0
9
0
0
0
0
0
Preliminary
PEIC
W1C
RO
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Overrun Error Interrupt Clear
The OEIC values are defined as follows:
Break Error Interrupt Clear
The BEIC values are defined as follows:
Parity Error Interrupt Clear
The PEIC values are defined as follows:
Framing Error Interrupt Clear
The FEIC values are defined as follows:
Value
Value
Value
Value
reserved
0
1
0
1
0
1
0
1
FEIC
W1C
RO
23
Description
No effect on the interrupt.
Clears interrupt.
Description
No effect on the interrupt.
Clears interrupt.
Description
No effect on the interrupt.
Clears interrupt.
Description
No effect on the interrupt.
Clears interrupt.
0
7
0
RTIC
W1C
RO
22
0
6
0
TXIC
W1C
RO
21
0
5
0
RXIC
W1C
RO
20
0
4
0
RO
RO
19
0
3
0
RO
RO
18
0
2
0
reserved
July 25, 2008
RO
RO
17
0
1
0
RO
RO
16
0
0
0

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