LM3S6422 Luminary Micro, Inc, LM3S6422 Datasheet - Page 8

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LM3S6422

Manufacturer Part Number
LM3S6422
Description
Lm3s6422 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Table of Contents
List of Figures
Figure 1-1.
Figure 2-1.
Figure 2-2.
Figure 5-1.
Figure 5-2.
Figure 5-3.
Figure 5-4.
Figure 5-5.
Figure 6-1.
Figure 6-2.
Figure 6-3.
Figure 7-1.
Figure 8-1.
Figure 8-2.
Figure 8-3.
Figure 9-1.
Figure 9-2.
Figure 9-3.
Figure 9-4.
Figure 10-1.
Figure 11-1.
Figure 11-2.
Figure 11-3.
Figure 11-4.
Figure 11-5.
Figure 12-1.
Figure 12-2.
Figure 12-3.
Figure 13-1.
Figure 13-2.
Figure 13-3.
Figure 13-4.
Figure 13-5.
Figure 13-6.
Figure 13-7.
Figure 13-8.
Figure 13-9.
Figure 13-10. MICROWIRE Frame Format (Single Frame) .................................................................... 324
Figure 13-11. MICROWIRE Frame Format (Continuous Transfer) ......................................................... 325
Figure 13-12. MICROWIRE Frame Format, SSIFss Input Setup and Hold Requirements ........................ 325
Figure 14-1.
Figure 14-2.
Figure 14-3.
Figure 15-1.
Figure 15-2.
8
Stellaris
CPU Block Diagram ......................................................................................................... 36
TPIU Block Diagram ........................................................................................................ 37
JTAG Module Block Diagram ............................................................................................ 47
Test Access Port State Machine ....................................................................................... 50
IDCODE Register Format ................................................................................................. 55
BYPASS Register Format ................................................................................................ 56
Boundary Scan Register Format ....................................................................................... 56
External Circuitry to Extend Reset .................................................................................... 58
Power Architecture .......................................................................................................... 61
Main Clock Tree .............................................................................................................. 63
Flash Block Diagram ...................................................................................................... 117
GPIO Port Block Diagram ............................................................................................... 142
GPIODATA Write Example ............................................................................................. 143
GPIODATA Read Example ............................................................................................. 143
GPTM Module Block Diagram ........................................................................................ 184
16-Bit Input Edge Count Mode Example .......................................................................... 188
16-Bit Input Edge Time Mode Example ........................................................................... 189
16-Bit PWM Mode Example ............................................................................................ 190
WDT Module Block Diagram .......................................................................................... 219
ADC Module Block Diagram ........................................................................................... 243
Differential Sampling Range, V
Differential Sampling Range, V
Differential Sampling Range, V
Internal Temperature Sensor Characteristic ..................................................................... 247
UART Module Block Diagram ......................................................................................... 276
UART Character Frame ................................................................................................. 277
IrDA Data Modulation ..................................................................................................... 279
SSI Module Block Diagram ............................................................................................. 316
TI Synchronous Serial Frame Format (Single Transfer) .................................................... 319
TI Synchronous Serial Frame Format (Continuous Transfer) ............................................ 319
Freescale SPI Format (Single Transfer) with SPO=0 and SPH=0 ...................................... 320
Freescale SPI Format (Continuous Transfer) with SPO=0 and SPH=0 .............................. 320
Freescale SPI Frame Format with SPO=0 and SPH=1 ..................................................... 321
Freescale SPI Frame Format (Single Transfer) with SPO=1 and SPH=0 ........................... 322
Freescale SPI Frame Format (Continuous Transfer) with SPO=1 and SPH=0 .................... 322
Freescale SPI Frame Format with SPO=1 and SPH=1 ..................................................... 323
Ethernet Controller Block Diagram .................................................................................. 354
Ethernet Controller ......................................................................................................... 354
Ethernet Frame ............................................................................................................. 356
Analog Comparator Module Block Diagram ..................................................................... 397
Structure of Comparator Unit .......................................................................................... 398
®
6000 Series High-Level Block Diagram ............................................................... 29
IN_ODD
IN_ODD
IN_ODD
Preliminary
= 1.5 V .................................................................. 246
= 0.75 V ................................................................ 246
= 2.25 V ................................................................ 247
July 25, 2008

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