LM3S6422 Luminary Micro, Inc, LM3S6422 Datasheet - Page 5

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LM3S6422

Manufacturer Part Number
LM3S6422
Description
Lm3s6422 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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10.3
10.4
10.5
11
11.1
11.2
11.2.1 Sample Sequencers ................................................................................................................ 243
11.2.2 Module Control ........................................................................................................................ 244
11.2.3 Hardware Sample Averaging Circuit ......................................................................................... 245
11.2.4 Analog-to-Digital Converter ...................................................................................................... 245
11.2.5 Differential Sampling ............................................................................................................... 245
11.2.6 Test Modes ............................................................................................................................. 247
11.2.7 Internal Temperature Sensor .................................................................................................... 247
11.3
11.3.1 Module Initialization ................................................................................................................. 248
11.3.2 Sample Sequencer Configuration ............................................................................................. 248
11.4
11.5
12
12.1
12.2
12.2.1 Transmit/Receive Logic ........................................................................................................... 276
12.2.2 Baud-Rate Generation ............................................................................................................. 277
12.2.3 Data Transmission .................................................................................................................. 277
12.2.4 Serial IR (SIR) ......................................................................................................................... 278
12.2.5 FIFO Operation ....................................................................................................................... 279
12.2.6 Interrupts ................................................................................................................................ 279
12.2.7 Loopback Operation ................................................................................................................ 280
12.2.8 IrDA SIR block ........................................................................................................................ 280
12.3
12.4
12.5
13
13.1
13.2
13.2.1 Bit Rate Generation ................................................................................................................. 317
13.2.2 FIFO Operation ....................................................................................................................... 317
13.2.3 Interrupts ................................................................................................................................ 317
13.2.4 Frame Formats ....................................................................................................................... 318
13.3
13.4
13.5
14
14.1
14.2
14.2.1 Internal MII Operation .............................................................................................................. 355
14.2.2 PHY Configuration/Operation ................................................................................................... 355
July 25, 2008
Initialization and Configuration ................................................................................................. 220
Register Map .......................................................................................................................... 220
Register Descriptions .............................................................................................................. 221
Analog-to-Digital Converter (ADC) ................................................................................. 242
Block Diagram ........................................................................................................................ 243
Functional Description ............................................................................................................. 243
Initialization and Configuration ................................................................................................. 248
Register Map .......................................................................................................................... 248
Register Descriptions .............................................................................................................. 249
Universal Asynchronous Receivers/Transmitters (UARTs) ......................................... 275
Block Diagram ........................................................................................................................ 276
Functional Description ............................................................................................................. 276
Initialization and Configuration ................................................................................................. 280
Register Map .......................................................................................................................... 281
Register Descriptions .............................................................................................................. 282
Synchronous Serial Interface (SSI) ................................................................................ 316
Block Diagram ........................................................................................................................ 316
Functional Description ............................................................................................................. 316
Initialization and Configuration ................................................................................................. 325
Register Map .......................................................................................................................... 326
Register Descriptions .............................................................................................................. 327
Ethernet Controller .......................................................................................................... 353
Block Diagram ........................................................................................................................ 354
Functional Description ............................................................................................................. 354
Preliminary
LM3S6422 Microcontroller
5

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