LM3S5632 Luminary Micro, Inc, LM3S5632 Datasheet - Page 16

• Manufacturer Part Number: LM3S5632
• Description: Lm3s5632 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Table of Contents
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Watchdog Timer ........................................................................................................................... 317
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Analog-to-Digital Converter (ADC) ............................................................................................. 340
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
16
GPTM Masked Interrupt Status (GPTMMIS), offset 0x020 ................................................ 306
GPTM Interrupt Clear (GPTMICR), offset 0x024 .............................................................. 307
GPTM TimerA Interval Load (GPTMTAILR), offset 0x028 ................................................. 309
GPTM TimerB Interval Load (GPTMTBILR), offset 0x02C ................................................ 310
GPTM TimerA Match (GPTMTAMATCHR), offset 0x030 ................................................... 311
GPTM TimerB Match (GPTMTBMATCHR), offset 0x034 .................................................. 312
GPTM TimerA Prescale (GPTMTAPR), offset 0x038 ........................................................ 313
GPTM TimerB Prescale (GPTMTBPR), offset 0x03C ....................................................... 314
GPTM TimerA (GPTMTAR), offset 0x048 ........................................................................ 315
GPTM TimerB (GPTMTBR), offset 0x04C ....................................................................... 316
Watchdog Load (WDTLOAD), offset 0x000 ...................................................................... 320
Watchdog Value (WDTVALUE), offset 0x004 ................................................................... 321
Watchdog Control (WDTCTL), offset 0x008 ..................................................................... 322
Watchdog Interrupt Clear (WDTICR), offset 0x00C .......................................................... 323
Watchdog Raw Interrupt Status (WDTRIS), offset 0x010 .................................................. 324
Watchdog Masked Interrupt Status (WDTMIS), offset 0x014 ............................................. 325
Watchdog Test (WDTTEST), offset 0x418 ....................................................................... 326
Watchdog Lock (WDTLOCK), offset 0xC00 ..................................................................... 327
Watchdog Peripheral Identification 4 (WDTPeriphID4), offset 0xFD0 ................................. 328
Watchdog Peripheral Identification 5 (WDTPeriphID5), offset 0xFD4 ................................. 329
Watchdog Peripheral Identification 6 (WDTPeriphID6), offset 0xFD8 ................................. 330
Watchdog Peripheral Identification 7 (WDTPeriphID7), offset 0xFDC ................................ 331
Watchdog Peripheral Identification 0 (WDTPeriphID0), offset 0xFE0 ................................. 332
Watchdog Peripheral Identification 1 (WDTPeriphID1), offset 0xFE4 ................................. 333
Watchdog Peripheral Identification 2 (WDTPeriphID2), offset 0xFE8 ................................. 334
Watchdog Peripheral Identification 3 (WDTPeriphID3), offset 0xFEC ................................. 335
Watchdog PrimeCell Identification 0 (WDTPCellID0), offset 0xFF0 .................................... 336
Watchdog PrimeCell Identification 1 (WDTPCellID1), offset 0xFF4 .................................... 337
Watchdog PrimeCell Identification 2 (WDTPCellID2), offset 0xFF8 .................................... 338
Watchdog PrimeCell Identification 3 (WDTPCellID3 ), offset 0xFFC .................................. 339
ADC Active Sample Sequencer (ADCACTSS), offset 0x000 ............................................. 348
ADC Raw Interrupt Status (ADCRIS), offset 0x004 ........................................................... 349
ADC Interrupt Mask (ADCIM), offset 0x008 ..................................................................... 350
ADC Interrupt Status and Clear (ADCISC), offset 0x00C .................................................. 351
ADC Overflow Status (ADCOSTAT), offset 0x010 ............................................................ 352
ADC Event Multiplexer Select (ADCEMUX), offset 0x014 ................................................. 353
ADC Underflow Status (ADCUSTAT), offset 0x018 ........................................................... 356
ADC Sample Sequencer Priority (ADCSSPRI), offset 0x020 ............................................. 357
ADC Processor Sample Sequence Initiate (ADCPSSI), offset 0x028 ................................. 358
ADC Sample Averaging Control (ADCSAC), offset 0x030 ................................................. 359
ADC Sample Sequence Input Multiplexer Select 0 (ADCSSMUX0), offset 0x040 ............... 360
ADC Sample Sequence Control 0 (ADCSSCTL0), offset 0x044 ........................................ 362
ADC Sample Sequence Result FIFO 0 (ADCSSFIFO0), offset 0x048 ................................ 365
ADC Sample Sequence Result FIFO 1 (ADCSSFIFO1), offset 0x068 ................................ 365
ADC Sample Sequence Result FIFO 2 (ADCSSFIFO2), offset 0x088 ................................ 365
ADC Sample Sequence Result FIFO 3 (ADCSSFIFO3), offset 0x0A8 ............................... 365
Preliminary
June 02, 2008