LM3S5632 Luminary Micro, Inc, LM3S5632 Datasheet - Page 510

• Manufacturer Part Number: LM3S5632
• Description: Lm3s5632 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Reset
Reset
Type
Type
Controller Area Network (CAN) Module
CAN Interrupt (CANINT)
CAN0 base: 0x4004.0000
Offset 0x010
Type RO, reset 0x0000.0000
510
Bit/Field
31:16
15:0
RO
RO
31
15
0
0
RO
RO
Register 5: CAN Interrupt (CANINT), offset 0x010
This register indicates the source of the interrupt.
If several interrupts are pending, the CAN Interrupt (CANINT) register points to the pending interrupt
with the highest priority, disregarding their chronological order. An interrupt remains pending until
the CPU has cleared it. If the IntId bit is not 0x0000 (the default) and the IE bit in the CANCTL
register is set, the interrupt is active. The interrupt line remains active until the IntId bit is set back
to 0x0000 when the cause of all interrupts are reset, or until IE is reset.
Note:
30
14
0
0
RO
RO
29
13
reserved
0
0
Name
Reading the CAN Status (CANSTS) register clears the CAN Interrupt (CANINT) register,
if it is pending.
IntId
RO
RO
28
12
0
0
RO
RO
27
11
0
0
Type
RO
RO
RO
RO
26
10
0
0
0x0000
0x0000
RO
RO
Reset
25
0
9
0
Preliminary
RO
RO
24
0
8
0
reserved
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Interrupt Identifier
The number in this field indicates the source of the interrupt.
IntId
Value
0x0000
0x0001-0x0020
0x0021-0x7FFF
0x8000
0x8001-0xFFFF
RO
RO
23
0
7
0
RO
RO
22
0
6
0
Definition
No interrupt pending
Number of the message object that caused the
interrupt
Unused
Status Interrupt
Unused
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
RO
RO
18
0
2
0
RO
RO
17
0
1
0
June 02, 2008
RO
RO
16
0
0
0