LM3S5652 Luminary Micro, Inc, LM3S5652 Datasheet - Page 16

• Manufacturer Part Number: LM3S5652
• Description: Lm3s5652 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Table of Contents
Register 23:
Register 24:
Register 25:
Register 26:
Register 27:
Register 28:
Register 29:
General-Purpose Input/Outputs (GPIOs) ................................................................................... 241
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Register 21:
Register 22:
Register 23:
Register 24:
Register 25:
Register 26:
Register 27:
Register 28:
Register 29:
Register 30:
Register 31:
Register 32:
Register 33:
General-Purpose Timers ............................................................................................................. 286
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
16
DMA Peripheral Identification 2 (DMAPeriphID2), offset 0xFE8 ......................................... 234
DMA Peripheral Identification 3 (DMAPeriphID3), offset 0xFEC ........................................ 235
DMA Peripheral Identification 4 (DMAPeriphID4), offset 0xFD0 ......................................... 236
DMA PrimeCell Identification 0 (DMAPCellID0), offset 0xFF0 ........................................... 237
DMA PrimeCell Identification 1 (DMAPCellID1), offset 0xFF4 ........................................... 238
DMA PrimeCell Identification 2 (DMAPCellID2), offset 0xFF8 ........................................... 239
DMA PrimeCell Identification 3 (DMAPCellID3), offset 0xFFC ........................................... 240
GPIO Data (GPIODATA), offset 0x000 ............................................................................ 250
GPIO Direction (GPIODIR), offset 0x400 ......................................................................... 251
GPIO Interrupt Sense (GPIOIS), offset 0x404 .................................................................. 252
GPIO Interrupt Both Edges (GPIOIBE), offset 0x408 ........................................................ 253
GPIO Interrupt Event (GPIOIEV), offset 0x40C ................................................................ 254
GPIO Interrupt Mask (GPIOIM), offset 0x410 ................................................................... 255
GPIO Raw Interrupt Status (GPIORIS), offset 0x414 ........................................................ 256
GPIO Masked Interrupt Status (GPIOMIS), offset 0x418 ................................................... 257
GPIO Interrupt Clear (GPIOICR), offset 0x41C ................................................................ 258
GPIO Alternate Function Select (GPIOAFSEL), offset 0x420 ............................................ 259
GPIO 2-mA Drive Select (GPIODR2R), offset 0x500 ........................................................ 261
GPIO 4-mA Drive Select (GPIODR4R), offset 0x504 ........................................................ 262
GPIO 8-mA Drive Select (GPIODR8R), offset 0x508 ........................................................ 263
GPIO Open Drain Select (GPIOODR), offset 0x50C ......................................................... 264
GPIO Pull-Up Select (GPIOPUR), offset 0x510 ................................................................ 265
GPIO Pull-Down Select (GPIOPDR), offset 0x514 ........................................................... 266
GPIO Slew Rate Control Select (GPIOSLR), offset 0x518 ................................................ 267
GPIO Digital Enable (GPIODEN), offset 0x51C ................................................................ 268
GPIO Lock (GPIOLOCK), offset 0x520 ............................................................................ 270
GPIO Commit (GPIOCR), offset 0x524 ............................................................................ 271
GPIO Analog Mode Select (GPIOAMSEL), offset 0x528 ................................................... 273
GPIO Peripheral Identification 4 (GPIOPeriphID4), offset 0xFD0 ....................................... 274
GPIO Peripheral Identification 5 (GPIOPeriphID5), offset 0xFD4 ....................................... 275
GPIO Peripheral Identification 6 (GPIOPeriphID6), offset 0xFD8 ....................................... 276
GPIO Peripheral Identification 7 (GPIOPeriphID7), offset 0xFDC ...................................... 277
GPIO Peripheral Identification 0 (GPIOPeriphID0), offset 0xFE0 ....................................... 278
GPIO Peripheral Identification 1 (GPIOPeriphID1), offset 0xFE4 ....................................... 279
GPIO Peripheral Identification 2 (GPIOPeriphID2), offset 0xFE8 ....................................... 280
GPIO Peripheral Identification 3 (GPIOPeriphID3), offset 0xFEC ...................................... 281
GPIO PrimeCell Identification 0 (GPIOPCellID0), offset 0xFF0 .......................................... 282
GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4 .......................................... 283
GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8 .......................................... 284
GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC ......................................... 285
GPTM Configuration (GPTMCFG), offset 0x000 .............................................................. 298
GPTM TimerA Mode (GPTMTAMR), offset 0x004 ............................................................ 299
GPTM TimerB Mode (GPTMTBMR), offset 0x008 ............................................................ 301
GPTM Control (GPTMCTL), offset 0x00C ........................................................................ 303
GPTM Interrupt Mask (GPTMIMR), offset 0x018 .............................................................. 306
GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C ..................................................... 308
Preliminary
June 02, 2008