LM3S5652 Luminary Micro, Inc, LM3S5652 Datasheet - Page 567

• Manufacturer Part Number: LM3S5652
• Description: Lm3s5652 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

June 02, 2008
Bit/Field
6:5
4:3
7
2
1
0
HOSTREQ
SESSION
reserved
reserved
Name
VBUS
DEV
Type
R/W
R/W
RO
RO
RO
RO
Reset
0x00
0x00
1
0
0
0
Preliminary
Description
Device Mode
This read-only bit indicates whether the USB controller is operating as
the OTG A device or the OTG B device.
Note:
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
VBus Level
These read-only bits encode the current VBus level as follows.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Host Request
When set, the USB controller initiates the Host Negotiation when
Suspend mode is entered. It is cleared when Host Negotiation is
completed.
Session Start/End
When operating as an OTG A device, this bit is set or cleared by the
CPU to start or end a session.
When operating as an OTG B device, this bit is set or cleared by the
USB controller when a session starts or ends. It is also set by the CPU
to initiate the Session Request Protocol. When the USB controller is in
Suspend mode, the bit may be cleared by the CPU to perform a software
disconnect.
Note:
Value
0
1
Value
0x0
0x1
0x2
0x3
Description
A device
B device
Description
Below SessionEnd
VBUS is detected as under 0.5 V.
Above SessionEnd, below AValid
VBUS is detected as above 0.5 V and under 1.5 V.
Above AValid, below VBusValid
VBUS is detected as above 1.5 V and below 4.5 V.
Above VBusValid
VBUS is detected as above 4.5 V.
This value is only valid while a session is in progress.
Clearing this bit when the core is not suspended will result in
undefined behavior.
LM3S5652 Microcontroller
567