LM3S5652 Luminary Micro, Inc, LM3S5652 Datasheet - Page 555

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LM3S5652

Manufacturer Part Number
LM3S5652
Description
Lm3s5652 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Reset
Type
USB Receive Interrupt Enable (USBRXIE)
Base 0x4005.0000
Offset 0x008
Type R/W, reset 0x000E
June 02, 2008
Host
Device
Bit/Field
15:4
RO
3
2
1
0
15
0
RO
Register 6: USB Receive Interrupt Enable (USBRXIE), offset 0x008
USBRXIE is a 16-bit register that provides interrupt enable bits for the interrupts in USBRXIS. When
a bit in USBRXIE is set to 1, the USB interrupt to the processor is asserted when the corresponding
interrupt bit in the USBRXIS register is set. When a bit is cleared to 0, the interrupt in USBRXIS is
still set but the USB interrupt to the processor is not asserted. On reset, the bits corresponding to
receive endpoints 1-3 are set to 1, while the remaining bits are set to 0.
14
0
RO
13
reserved
reserved
0
Name
EP3
EP2
EP1
RO
12
0
RO
11
0
Type
R/W
R/W
R/W
RO
RO
RO
10
0
reserved
RO
Reset
0x00
9
0
1
1
1
0
Preliminary
RO
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
RX Endpoint 3 Interrupt Enable
RX Endpoint 2 Interrupt Enable
RX Endpoint 1 Interrupt Enable
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
RO
7
0
RO
6
0
RO
5
0
RO
4
0
EP3
R/W
3
1
LM3S5652 Microcontroller
R/W
EP2
2
1
EP1
R/W
1
1
reserved
RO
0
0
555

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