LM3S3759 Luminary Micro, Inc, LM3S3759 Datasheet - Page 142

• Manufacturer Part Number: LM3S3759
• Description: Lm3s3759 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Reset
Reset
Type
Type
Hibernation Module
Hibernation Control (HIBCTL)
Base 0x400F.C000
Offset 0x010
Type R/W, reset 0x0000.0000
142
Bit/Field
30:8
WRC
31
RO
RO
7
31
15
1
0
RO
RO
Register 5: Hibernation Control (HIBCTL), offset 0x010
This register is the control register for the Hibernation module.
30
14
0
0
RO
RO
29
13
reserved
VABORT
0
0
Name
WRC
RO
RO
28
12
0
0
reserved
RO
RO
27
11
0
0
Type
R/W
RO
RO
RO
RO
26
10
0
0
RO
RO
Reset
25
0x00
0
9
0
1
0
Preliminary
RO
RO
24
0
8
0
Description
Write Complete/Capable
This bit indicates whether the hibernation module can receive a write
operation.
Software must poll this bit between write requests and defer writes until
WRC=1 to ensure proper operation.
This difference may be exploited by software at reset time to detect
which method of programming is appropriate: 0 = software delay loops
required; 1 = WRC paced available.
The bit name WRC means "Write Complete," which is the normal use
of the bit (between write accesses). However, because the bit is set
out-of-reset, the name can also mean "Write Capable" which simply
indicates that the interface may be written to by software. This meaning
also has more meaning to the out-of-reset sense.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Power Cut Abort Enable
Value
Value
VABORT
reserved
0
1
0
1
R/W
RO
23
0
7
0
Description
The interface is processing a prior write and is busy. Any write
operation that is attempted while WRC is 0 results in
undetermined behavior.
The interface is ready to accept a write.
Description
Power cut occurs during a low-battery alert.
Power cut is aborted.
CLK32EN
R/W
RO
22
0
6
0
LOWBA TEN
R/W
RO
21
0
5
0
PINWEN
R/W
RO
20
0
4
0
RTCWEN
R/W
RO
19
0
3
0
CLKSEL
R/W
RO
18
0
2
0
HIBREQ
R/W
RO
17
0
1
0
June 02, 2008
RTCEN
R/W
RO
16
0
0
0