LM3S3759 Luminary Micro, Inc, LM3S3759 Datasheet - Page 200

• Manufacturer Part Number: LM3S3759
• Description: Lm3s3759 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Micro Direct Memory Access (μDMA)
9.4
Table 9-13. μDMA Register Map
200
μDMA Channel Control Structure
μDMA Registers
Offset
0x00C
0x01C
0x000
0x004
0x008
0x000
0x004
0x008
0x010
0x014
0x018
0x020
0x024
Name
DMASRCENDP
DMADSTENDP
DMACHCTL
DMASTAT
DMACFG
DMACTLBASE
DMAALTBASE
DMAWAITSTAT
DMASWREQ
DMAUSEBURSTSET
DMAUSEBURSTCLR
DMAREQMASKSET
DMAREQMASKCLR
2.
Register Map
Table 9-13 on page 200 lists the μDMA channel control structures and registers. The channel control
structure shows the layout of one entry in the channel control table. The channel control table is
located in system memory, and the location is determined by the application, that is, the base
address is n/a (not applicable). In the table below, the offset for the channel control structures is the
offset from the entry in the channel control table. See “Channel Configuration” on page 183 and Table
9-3 on page 184 for a description of how the entries in the channel control table are located in memory.
The μDMA register addresses are given as a hexadecimal increment, relative to the μDMA base
address of 0x400F.F000.
a.
b.
Read the alternate channel control word at offset 0x288 and check the XFERMODE field. If the
field is 0, this means buffer B is complete. If buffer B is complete, then:
a.
b.
Process the newly received data in buffer A, or signal the buffer processing code that buffer
A has data available.
Reprogram the primary channel control word at offset 0x88 according to Table
9-12 on page 199.
Process the newly received data in buffer B, or signal the buffer processing code that buffer
B has data available.
Reprogram the alternate channel control word at offset 0x288 according to Table
9-12 on page 199.
Type
R/W
R/W
R/W
R/W
R/W
R/W
WO
WO
WO
WO
RO
RO
RO
0x0000.0000
0x0000.0200
0x0000.0000
0x0000.0000
0x0000.0000
0x001F.0000
Reset
-
-
-
-
-
-
-
Preliminary
Description
DMA Channel Source Address End Pointer
DMA Channel Destination Address End Pointer
DMA Channel Control Word
DMA Status
DMA Configuration
DMA Channel Control Base Pointer
DMA Alternate Channel Control Base Pointer
DMA Channel Wait on Request Status
DMA Channel Software Request
DMA Channel Useburst Set
DMA Channel Useburst Clear
DMA Channel Request Mask Set
DMA Channel Request Mask Clear
June 02, 2008
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