74LVC1G74DC,125 NXP Semiconductors, 74LVC1G74DC,125 Datasheet - Page 16

IC SNGL D FF POS-EDG TRIG 8VSSOP

74LVC1G74DC,125

Manufacturer Part Number
74LVC1G74DC,125
Description
IC SNGL D FF POS-EDG TRIG 8VSSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Type
D-Typer
Datasheet

Specifications of 74LVC1G74DC,125

Output Type
Differential
Package / Case
US8, 8-VSSOP
Function
Set(Preset) and Reset
Number Of Elements
1
Number Of Bits Per Element
1
Frequency - Clock
200MHz
Trigger Type
Positive Edge
Current - Output High, Low
32mA, 32mA
Voltage - Supply
1.65 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Circuits
1
Logic Family
74LVC
Logic Type
CMOS
Polarity
Inverting/Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
13.4 ns
High Level Output Current
- 32 mA
Low Level Output Current
32 mA
Supply Voltage (max)
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
1.65 V
Technology
CMOS
Number Of Bits
1
Number Of Elements
1
Clock-edge Trigger Type
Positive-Edge
Operating Supply Voltage (typ)
1.8/2.5/3.3/5V
Package Type
VSSOP
Operating Supply Voltage (min)
1.65V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Delay Time - Propagation
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4494-2
74LVC1G74DC-G
74LVC1G74DC-G
935274973125
NXP Semiconductors
Fig 13. Package outline SOT833-1 (XSON8)
74LVC1G74
Product data sheet
XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm
DIMENSIONS (mm are the original dimensions)
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
UNIT
mm
SOT833-1
VERSION
OUTLINE
max
A
terminal 1
index area
0.5
e
(1)
(2)
max
0.04
L
A
1
1
0.25
0.17
b
IEC
- - -
1
8
2.0
1.9
D
e
1
1.05
0.95
E
0
2
7
MO-252
JEDEC
0.6
All information provided in this document is subject to legal disclaimers.
e
e
D
REFERENCES
1
0.5
e
1
Single D-type flip-flop with set and reset; positive edge trigger
Rev. 9 — 5 August 2010
3
6
0.35
0.27
L
JEITA
e
- - -
1
0.40
0.32
scale
L
1
1
b
4
5
A
L
1
E
A
(2)
2 mm
PROJECTION
EUROPEAN
74LVC1G74
© NXP B.V. 2010. All rights reserved.
ISSUE DATE
07-11-14
07-12-07
SOT833-1
16 of 25

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