74HC377D,652 NXP Semiconductors, 74HC377D,652 Datasheet - Page 12

• Manufacturer Part Number: 74HC377D,652
• Description: IC OCTAL D F-F POS-EDGE 20-SOIC
• Manufacturer: NXP Semiconductors
• Series: 74HCr
• Type: D-Type Busr

Specifications of 74HC377D,652

• Output Type: Non-Inverted
• Package / Case: 20-SOIC (7.5mm Width)
• Function: Standard
• Number Of Elements: 1
• Number Of Bits Per Element: 8
• Frequency - Clock: 83MHz
• Delay Time - Propagation: 13ns
• Trigger Type: Positive Edge
• Voltage - Supply: 2 V ~ 6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Circuits: 1
• Logic Family: HC
• Logic Type: D-Type Edge Triggered Flip-Flop
• Polarity: Non-Inverting
• Input Type: Single-Ended
• Propagation Delay Time: 13 ns at 5 V
• High Level Output Current: - 5.2 mA
• Low Level Output Current: 5.2 mA
• Supply Voltage (max): 6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Voltage (min): 2 V
• Technology: CMOS
• Number Of Bits: 8
• Number Of Elements: 1
• Clock-edge Trigger Type: Positive-Edge
• Operating Supply Voltage (typ): 5V
• Package Type: SOIC W
• Frequency (max): 24MHz
• Operating Supply Voltage (min): 2V
• Operating Supply Voltage (max): 6V
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output High, Low: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 568-2670-5; 933713980652

Philips Semiconductors
Test circuit for 74HC
HCT TYPES
AC waveforms 74HCT
March 1988
handbook, full pagewidth
HCMOS family characteristics
Switch position
Note
1. For open-drain N-channel outputs t
TEST
t
t
t
t
C
R
PZH
PZL
PHZ
PLZ
L
T
=
=
Fig.8 Input rise and fall times, transition times and propagation delays for combinatorial logic ICs.
load capacitance including jig and probe capacitance
(see AC CHARACTERISTICS for values).
termination resistance should be equal to the output impedance Z
the pulse generator.
SWITCH
GND
V
GND
V
CC
CC
handbook, halfpage
GENERATOR
PULSE
INPUT
OUTPUT
Fig.7 Test circuit for 3-state outputs.
PLZ
and t
V I
t PHL
t THL
10%
90%
PZL
R T
t r
1.3 V
are applicable.
90%
1.3 V
10%
D.U.T
V CC
12
o
of
t f
V O
C L
t PLH
t TLH
R L = 1 k
50 pF
MGK567
FAMILY SPECIFICATIONS
3 V
GND
MGK563
V CC