DA28F320S5-120 Intel, DA28F320S5-120 Datasheet - Page 5

• Manufacturer Part Number: DA28F320S5-120
• Description: Word-wide FlashFile memory. 32 Mbit, access speed 120 ns
• Manufacturer: Intel

1.0
This datasheet contains Word-Wide FlashFile™
memory (28F160S5, 28F320S5) specifications.
Section 1.0 provides a flash memory overview.
Sections 2.0 through 5.0 describe the memory
organization and functionality. Section 6.0 covers
electrical specifications for extended temperature
product offerings. Finally, Section 7.0 provides
ordering and reference information.
1.1
The Word-Wide FlashFile memory family maintains
basic compatibility with Intel’s 28F016SA and
28F016SV. Key enhancements include:
They share a compatible status register, basic
software commands, and pinout. These similarities
enable a clean migration from the 28F016SA or
28F016SV. When upgrading, it is important to note
the following differences:
1.2
The Word-Wide FlashFile memory family provides
density upgrades with pinout compatibility for the
16-
performance memories arranged as 1 Mword and
2 Mwords of 16 bits or 2 Mbyte and 4 Mbyte of
8 bits. This data is grouped in thirty-two and sixty-
four 64-Kbyte blocks that can be erased, locked,
and unlocked in-system. Figure 1 shows the block
diagram, and Figure 4 illustrates the memory
organization.
ADVANCED INFORMATION
Common Flash Interface (CFI) Support
Scaleable Command Set (SCS) Support
S5 Technology
Enhanced Suspend Capabilities
Because of new feature and density options,
the devices have different device identifier
codes. This allows for software optimization.
New software commands.
To take advantage of the 5 V technology on the
28F160S5
connection
28F320S5 FlashFile memories do not support a
12 V V
and
INTRODUCTION
New Features
Product Overview
PP
32-Mbit
option.
to
and
V
densities.
CC
28F320S5,
.
The
They
28F160S5
allow
are
high-
V
and
PP
Specifically designed for 5 V systems, the
28F160S5 and 28F320S5 support read and write
operation with V
capability,
achieved through small, highly-optimized write
buffer operations. Additionally, the dedicated V
pin gives complete data protection when V
V
A Common Flash Interface (CFI) permits OEM-
specified software algorithms to be used for entire
families
independent, JEDEC ID-independent, and forward-
and backward-compatible software support for the
specified flash device families. Flash vendors can
standardize their existing interfaces for long-term
compatibility.
Scaleable Command Set (SCS) allows a single,
simple software driver in all host systems to work
with all SCS-compliant flash memory devices,
independent
memory card, SIMM, or direct-to-board placement).
Additionally,
system/device data transfer rates and minimizes
device and system-level implementation costs.
A Command User Interface (CUI) serves as the
interface between the system processor and
internal device operation.
sequence written to the CUI initiates device
automation. An internal Write State Machine (WSM)
automatically executes the algorithms and timings
necessary for block erase, program, and lock-bit
configuration operations.
A block erase operation erases one of the device’s
64-Kbyte
independent of other blocks. Each block can be
independently
commercial temperature range (0 °C to +70 °C) and
10,000 times in the extended temperature range
(–40 °C to +85 °C). Block erase suspend allows
system software to suspend block erase to read or
write data from any other block.
Data is programmed in byte, word or page
increments. Program suspend mode enables the
system to read data or execute code from any other
flash memory array location.
The device incorporates two Write Buffers of 32
bytes (16 words) to allow optimum-performance
data programming. This feature can improve
system program performance by up to eight times
over non-buffer programming.
PPLK
.
of
blocks
high
of
devices.
SCS
CC
erased
system-level
programming
equal to V
typically
provides
100,000
28F160S5, 28F320S5
This
PP
within
A
. Coupled with this
packaging
performance
valid
allows
times
the
t
WHQV2/EHQV2
command
in
device-
highest
(e.g.,
PP
the
PP
is
5