74ALVCH16374DL,118 NXP Semiconductors, 74ALVCH16374DL,118 Datasheet

IC 16BIT EDGE-TRIG D F-F 48SSOP

74ALVCH16374DL,118

Manufacturer Part Number
74ALVCH16374DL,118
Description
IC 16BIT EDGE-TRIG D F-F 48SSOP
Manufacturer
NXP Semiconductors
Series
74ALVCHr
Type
D-Type Busr
Datasheet

Specifications of 74ALVCH16374DL,118

Function
Standard
Output Type
Tri-State Non Inverted
Number Of Elements
2
Number Of Bits Per Element
8
Frequency - Clock
300MHz
Delay Time - Propagation
2.4ns
Trigger Type
Positive Edge
Current - Output High, Low
24mA, 24mA
Voltage - Supply
1.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74ALVCH16374DL-T
74ALVCH16374DL-T
935260444118
1. General description
2. Features and benefits
The 74ALVCH16374 is 16-bit edge-triggered flip-flop featuring separate D-type inputs for
each flip-flop and 3-state outputs for bus oriented applications.
Incorporates bus hold data inputs which eliminate the need for external pull-up or
pull-down resistors to hold unused inputs.
The 74ALVCH16374 consists of 2 sections of eight edge-triggered flip-flops. A clock (CP)
input and an output enable (OE) are provided per 8-bit section.
The flip-flops will store the state of their individual D-inputs that meet the set-up and hold
time requirements on the LOW-to-HIGH CP transition.
When OE is LOW, the contents of the flip-flops are available at the outputs. When OE is
HIGH, the outputs go the high-impedance OFF-state. Operation of the OE input does not
affect the state of the flip-flops.
74ALVCH16374
2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
Rev. 03 — 27 April 2010
Wide supply voltage range from 1.2 V to 3.6 V
Complies with JEDEC standard JESD8-B
CMOS low power consumption
MULTIBYTE flow-through standard pin-out architecture
Low inductance multiple V
Direct interface with TTL levels
All data inputs have bus hold
Output drive capability 50 Ω transmission lines at 85 °C
Current drive ±24 mA at V
CC
CC
= 3.0 V
and GND pins for minimum noise and ground bounce
Product data sheet

Related parts for 74ALVCH16374DL,118

74ALVCH16374DL,118 Summary of contents

Page 1

V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state Rev. 03 — 27 April 2010 1. General description The 74ALVCH16374 is 16-bit edge-triggered flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. Incorporates bus ...

Page 2

... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Temperature range Package −40 °C to +85 °C 74ALVCH16374DL −40 °C to +85 °C 74LVCH16374DGG 4. Functional diagram Fig 1. Logic symbol 74ALVCH16374_3 Product data sheet 2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state Name Description SSOP48 plastic shrink small outline package ...

Page 3

... NXP Semiconductors Fig 2. IEC logic symbol Fig 3. Bus hold circuit 1D0 1CP 1OE Fig 4. Logic diagram 74ALVCH16374_3 Product data sheet 2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state 1 1OE 1EN 48 1CP C1 24 2OE 2EN 25 2CP C2 47 1D0 1D1 44 1D2 43 1D3 41 1D4 40 1D5 ...

Page 4

... NXP Semiconductors 5. Pinning information 5.1 Pinning Fig 5. Pin configuration 74ALVCH16374_3 Product data sheet 2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state 74ALVCH16374 1 1OE 1Q0 2 1Q1 3 GND 4 1Q2 5 6 1Q3 1Q4 8 1Q5 9 GND 10 11 1Q6 12 1Q7 2Q0 13 2Q1 14 GND 15 16 2Q2 17 2Q3 V 18 ...

Page 5

... NXP Semiconductors 5.2 Pin description Table 2. Pin description Symbol Pin 1OE, 2OE 1, 24 1Q0 to 1Q7 11, 12 2Q0 to 2Q7 13, 14, 16, 17, 19, 20, 22, 23 GND 4, 10, 15, 21, 28, 34, 39 18, 31 1D0 to 1D7 47, 46, 44, 43, 41, 40, 38, 37 2D0 to 2D7 36, 35, 33, 32, 30, 29, 27, 26 1CP, 2CP 48 ...

Page 6

... NXP Semiconductors 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC I input clamping current IK V input voltage I I output clamping current OK V output voltage O I output current ...

Page 7

... NXP Semiconductors 9. Static characteristics Table 6. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter = −40 °C to +85 °C T amb V HIGH-level input IH voltage V LOW-level input IL voltage V HIGH-level output OH voltage V LOW-level output OL voltage I input leakage current I I OFF-state output ...

Page 8

... NXP Semiconductors Table 6. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter ΔI additional supply CC current I bus hold LOW current BHL I bus hold HIGH current BHH I bus hold LOW BHLO overdrive current I bus hold HIGH BHHO overdrive current ...

Page 9

... NXP Semiconductors Table 7. Dynamic characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V); test circuit Symbol Parameter t disable time dis t pulse width W t set-up time su t hold time h C power dissipation PD capacitance [1] All typical values are measured at T [2] Typical values are measured at V ...

Page 10

... NXP Semiconductors 11. Waveforms Measurement points are given in V and V are typical output levels that occur with the output load Fig 6. Propagation delay, clock input (nCP) to data output (nQn), and pulse width nOE input nQn output LOW-to-OFF OFF-to-LOW nQn output HIGH-to-OFF OFF-to-HIGH ...

Page 11

... NXP Semiconductors Table 8. Measurement points Supply voltage Input 2 2.7 V and V CC < 2.3 V 2.7 V 2 3.6 V 2.7 V 12. Test information Test data is given in Table Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to output impedance Z ...

Page 12

... NXP Semiconductors 13. Package outline SSOP48: plastic shrink small outline package; 48 leads; body width 7 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.4 2.35 mm 2.8 0.25 0.2 2.20 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE ...

Page 13

... NXP Semiconductors TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6 pin 1 index 1 DIMENSIONS (mm are the original dimensions). A UNIT max. 0.15 1.05 mm 1.2 0.25 0.05 0.85 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 14

... V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state Data sheet status Product data sheet – The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. – Legal texts have been adapted to the new company name where appropriate. – Table 7 “Dynamic characteristics” ...

Page 15

... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...

Page 16

... NXP Semiconductors 17. Contact information For more information, please visit: For sales office addresses, please send an email to: 74ALVCH16374_3 Product data sheet 2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 03 — 27 April 2010 74ALVCH16374 © ...

Page 17

... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 6 Functional description . . . . . . . . . . . . . . . . . . . 5 6.1 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 5 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 12 Test information ...

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