scc2681 NXP Semiconductors, scc2681 Datasheet - Page 21

no-image

scc2681

Manufacturer Part Number
scc2681
Description
Dual Asynchronous Receiver/transmitter Duart
Manufacturer
NXP Semiconductors
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
scc2681AC1A44
Manufacturer:
NXP
Quantity:
1 192
Part Number:
scc2681AC1A44,512
Manufacturer:
TI
Quantity:
334
Part Number:
scc2681AC1A44,512
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
scc2681AC1A44,518
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
scc2681AC1A44,529
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
scc2681AC1N28
Manufacturer:
HARVATEK
Quantity:
40 000
Part Number:
scc2681AC1N40
Manufacturer:
INFINEON
Quantity:
82
Part Number:
scc2681AC1N40
Manufacturer:
NXP
Quantity:
5 510
Part Number:
scc2681AE1A44,529
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
scc2681TC1A44
Manufacturer:
PHI-Pbf
Quantity:
1 179
Part Number:
scc2681TC1A44
Manufacturer:
PHILIPS/飞利浦
Quantity:
20 000
Philips Semiconductors
Table 5. Baud Rates Extended
NOTE: Each read on address H‘2’ will toggle the baud rate test mode. When in the BRG test mode, the baud rates change as shown to the left.
This change affects all receivers and transmitters on the DUART. See “Extended baud rates for SCN2681, SCN68681, SCC2691, SCC2692,
SCC68692 and SCC2698B” in application notes elsewhere in this publication.
The test mode at address H‘A’ changes all transmitters and receivers to the 1 mode and connects the output ports to some internal nodes.
2004 Apr 06
Dual asynchronous receiver/transmitter (DUART)
Reset can also be accomplished easily by first exiting the wake-up mode (MR1[4:3] = 00 or 01 or 10), then issuing a receiver software or
Receiver Reset in the Normal Mode (Receiver Enabled)
Reset can be accomplished easily by issuing a receiver software or hardware reset followed by a receiver enable. All receiver data,
status and programming will be preserved and available before reset. The reset will NOT affect the programming.
Receiver Reset in the Wake-Up Mode (MR1[4:3] = 11)
hardware reset followed by a wake-up re-entry (MR1[4:3] = 11). All receiver data, status and programming will be preserved and
available before reset. The reset will NOT affect other programming.
The reason for this is the receiver is partially enabled when the parity bits are at ‘11’. Thus the receiver disable and reset is bypassed by
the partial enabling of the receiver.
CSR[7:4]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
ACR[7] = 0
I/O2 – 16
I/O2 – 1
38.4 k
134.5
1,200
1,050
2,400
4,800
7,200
9,600
Timer
110
200
300
600
50
Normal BRG
ACR[7] = 1
I/O2 – 16
I/O2 – 1
19.2 k
134.5
1,200
2,000
2,400
4,800
1,800
9,600
Timer
150
300
600
110
75
21
ACR[7] = 0
I/O2 – 16
I/O2 – 1
115.2 k
19.2 k
28.8 k
57.6 k
57.6 k
57.6 k
38.4 k
4,800
1,076
1,050
4,800
9,600
Timer
880
BRG Extended Rates
ACR[7] = 1
I/O2 – 16
I/O2 – 1
SCC2681
115.2 k
14.4 k
28.8 k
57.6 k
57.6 k
14.4 k
19.2 k
7,200
1,076
2,000
4,800
9,600
Timer
880
Product data
SD00097

Related parts for scc2681