st2064b Sitronix Technology Corporation, st2064b Datasheet - Page 15

• Manufacturer Part Number: st2064b
• Description: 8 Bit Microcontroller With 64k Bytes Rom
• Manufacturer: Sitronix Technology Corporation

10.2.6 Port-A Interrupt De-bounce
ST2064B has hardware de-bounce block for Port-A interrupt. It
is enabled with “ 1” and disable with “ 0” of PDBN(PMCR[6]).
The de-bounce function is activated by Port-A transition. It uses
10.2.7 PA0/INTX
PA0 plays another function of external edge-sensitive interrupt
source. Falling or rising edge is controlled by INTEG(PMCR[5]).
Please refer to FIGURE 10-3. If both INTX and PT interrupts
Steps for INTX interrupt operation:
Ver. 3.0
Address Name
$00F
1.
2.
3.
4.
5.
Bit 6: PDBN : Enable Port-A interrupt de-bounce bit
Set PA0 to input mode. (PCA[0])
Select edge level. (INTEG)
Clear INTX interrupt request flag. (IRX)
Set INTX interrupt enable bits. (IEX)
Clear CPU interrupt mask flag (I).
PMCR
1 = De-bounce for Port-A interrupt
0 = No de-bounce for Port-A interrupt
R/W
R/W
PULL
Bit 7
TABLE 10-6 Port Function Control Register (PMCR)
PDBN
Bit 6
PA 0/INTX
PMCR[5]
FIGURE 10-3 INTX Logic Diagram
INTEG
Bit 5
15/57
Bit 4
-
OSCX as the sampling clock. The de-bounce time is OSCX x
512 cycles (about 16 ms). Data filtered by de-bounce
presents a stable state, then the interrupt can be issued.
are enabled, signal edge of PA0 may trigger PT interrupt as
well as INTX. Steps and program example are shown below.
Example:
Falling Edge Interrupt
Bit 3
RMB0
SMB5
RMB0
SMB0
CLI
-
.
.
.
.
<PCA
<PMCR
<IREQ
<IENA
Bit 2
-
Bit 1
-
; Set input mode.
; Rising edge.
; Clear IRQ flag.
; Enable INTX interrupt.
Bit 0
-
100 - - - - -
Default
ST2064B
5/8/09